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1172460e71
This hook is meant to be used by any provider and instantiating a layout just for this is useless. Let's instead move this hook to the nvmem device and add it to the config structure to be easily shared by the providers. While at moving this hook, rename it ->fixup_dt_cell_info() to clarify its main intended purpose. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20231215111536.316972-6-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
142 lines
3.4 KiB
C
142 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2015 MediaTek Inc.
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* Author: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
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*/
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/io.h>
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#include <linux/nvmem-provider.h>
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#include <linux/platform_device.h>
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#include <linux/property.h>
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struct mtk_efuse_pdata {
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bool uses_post_processing;
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};
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struct mtk_efuse_priv {
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void __iomem *base;
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};
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static int mtk_reg_read(void *context,
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unsigned int reg, void *_val, size_t bytes)
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{
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struct mtk_efuse_priv *priv = context;
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void __iomem *addr = priv->base + reg;
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u8 *val = _val;
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int i;
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for (i = 0; i < bytes; i++, val++)
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*val = readb(addr + i);
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return 0;
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}
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static int mtk_efuse_gpu_speedbin_pp(void *context, const char *id, int index,
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unsigned int offset, void *data, size_t bytes)
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{
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u8 *val = data;
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if (val[0] < 8)
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val[0] = BIT(val[0]);
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return 0;
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}
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static void mtk_efuse_fixup_dt_cell_info(struct nvmem_device *nvmem,
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struct nvmem_cell_info *cell)
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{
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size_t sz = strlen(cell->name);
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/*
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* On some SoCs, the GPU speedbin is not read as bitmask but as
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* a number with range [0-7] (max 3 bits): post process to use
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* it in OPP tables to describe supported-hw.
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*/
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if (cell->nbits <= 3 &&
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strncmp(cell->name, "gpu-speedbin", min(sz, strlen("gpu-speedbin"))) == 0)
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cell->read_post_process = mtk_efuse_gpu_speedbin_pp;
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}
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static int mtk_efuse_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct resource *res;
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struct nvmem_device *nvmem;
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struct nvmem_config econfig = {};
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struct mtk_efuse_priv *priv;
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const struct mtk_efuse_pdata *pdata;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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pdata = device_get_match_data(dev);
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econfig.add_legacy_fixed_of_cells = true;
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econfig.stride = 1;
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econfig.word_size = 1;
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econfig.reg_read = mtk_reg_read;
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econfig.size = resource_size(res);
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econfig.priv = priv;
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econfig.dev = dev;
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if (pdata->uses_post_processing)
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econfig.fixup_dt_cell_info = &mtk_efuse_fixup_dt_cell_info;
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nvmem = devm_nvmem_register(dev, &econfig);
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return PTR_ERR_OR_ZERO(nvmem);
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}
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static const struct mtk_efuse_pdata mtk_mt8186_efuse_pdata = {
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.uses_post_processing = true,
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};
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static const struct mtk_efuse_pdata mtk_efuse_pdata = {
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.uses_post_processing = false,
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};
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static const struct of_device_id mtk_efuse_of_match[] = {
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{ .compatible = "mediatek,mt8173-efuse", .data = &mtk_efuse_pdata },
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{ .compatible = "mediatek,mt8186-efuse", .data = &mtk_mt8186_efuse_pdata },
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{ .compatible = "mediatek,efuse", .data = &mtk_efuse_pdata },
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{/* sentinel */},
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};
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MODULE_DEVICE_TABLE(of, mtk_efuse_of_match);
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static struct platform_driver mtk_efuse_driver = {
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.probe = mtk_efuse_probe,
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.driver = {
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.name = "mediatek,efuse",
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.of_match_table = mtk_efuse_of_match,
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},
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};
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static int __init mtk_efuse_init(void)
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{
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int ret;
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ret = platform_driver_register(&mtk_efuse_driver);
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if (ret) {
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pr_err("Failed to register efuse driver\n");
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return ret;
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}
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return 0;
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}
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static void __exit mtk_efuse_exit(void)
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{
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return platform_driver_unregister(&mtk_efuse_driver);
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}
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subsys_initcall(mtk_efuse_init);
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module_exit(mtk_efuse_exit);
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MODULE_AUTHOR("Andrew-CT Chen <andrew-ct.chen@mediatek.com>");
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MODULE_DESCRIPTION("Mediatek EFUSE driver");
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MODULE_LICENSE("GPL v2");
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