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1a3b3bd142
Add bindings documentation for the SM8650 TCSR Clock Controller. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-1-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
18 lines
519 B
C
18 lines
519 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2023, Linaro Limited
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8650_H
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#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8650_H
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/* TCSR CC clocks */
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#define TCSR_PCIE_0_CLKREF_EN 0
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#define TCSR_PCIE_1_CLKREF_EN 1
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#define TCSR_UFS_CLKREF_EN 2
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#define TCSR_UFS_PAD_CLKREF_EN 3
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#define TCSR_USB2_CLKREF_EN 4
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#define TCSR_USB3_CLKREF_EN 5
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#endif
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