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0ee7261c92
OMAP interconnect drivers are used for the interconnect error handling. Since they are bus driver, lets move it to newly created drivers/bus. Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
297 lines
7.3 KiB
C
297 lines
7.3 KiB
C
/*
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* OMAP3XXX L3 Interconnect Driver
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*
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* Copyright (C) 2011 Texas Corporation
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* Felipe Balbi <balbi@ti.com>
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* Santosh Shilimkar <santosh.shilimkar@ti.com>
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* Sricharan <r.sricharan@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
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* USA
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*/
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include "omap_l3_smx.h"
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static inline u64 omap3_l3_readll(void __iomem *base, u16 reg)
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{
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return __raw_readll(base + reg);
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}
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static inline void omap3_l3_writell(void __iomem *base, u16 reg, u64 value)
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{
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__raw_writell(value, base + reg);
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}
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static inline enum omap3_l3_code omap3_l3_decode_error_code(u64 error)
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{
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return (error & 0x0f000000) >> L3_ERROR_LOG_CODE;
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}
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static inline u32 omap3_l3_decode_addr(u64 error_addr)
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{
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return error_addr & 0xffffffff;
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}
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static inline unsigned omap3_l3_decode_cmd(u64 error)
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{
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return (error & 0x07) >> L3_ERROR_LOG_CMD;
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}
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static inline enum omap3_l3_initiator_id omap3_l3_decode_initid(u64 error)
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{
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return (error & 0xff00) >> L3_ERROR_LOG_INITID;
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}
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static inline unsigned omap3_l3_decode_req_info(u64 error)
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{
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return (error >> 32) & 0xffff;
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}
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static char *omap3_l3_code_string(u8 code)
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{
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switch (code) {
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case OMAP_L3_CODE_NOERROR:
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return "No Error";
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case OMAP_L3_CODE_UNSUP_CMD:
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return "Unsupported Command";
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case OMAP_L3_CODE_ADDR_HOLE:
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return "Address Hole";
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case OMAP_L3_CODE_PROTECT_VIOLATION:
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return "Protection Violation";
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case OMAP_L3_CODE_IN_BAND_ERR:
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return "In-band Error";
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case OMAP_L3_CODE_REQ_TOUT_NOT_ACCEPT:
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return "Request Timeout Not Accepted";
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case OMAP_L3_CODE_REQ_TOUT_NO_RESP:
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return "Request Timeout, no response";
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default:
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return "UNKNOWN error";
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}
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}
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static char *omap3_l3_initiator_string(u8 initid)
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{
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switch (initid) {
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case OMAP_L3_LCD:
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return "LCD";
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case OMAP_L3_SAD2D:
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return "SAD2D";
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case OMAP_L3_IA_MPU_SS_1:
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case OMAP_L3_IA_MPU_SS_2:
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case OMAP_L3_IA_MPU_SS_3:
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case OMAP_L3_IA_MPU_SS_4:
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case OMAP_L3_IA_MPU_SS_5:
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return "MPU";
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case OMAP_L3_IA_IVA_SS_1:
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case OMAP_L3_IA_IVA_SS_2:
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case OMAP_L3_IA_IVA_SS_3:
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return "IVA_SS";
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case OMAP_L3_IA_IVA_SS_DMA_1:
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case OMAP_L3_IA_IVA_SS_DMA_2:
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case OMAP_L3_IA_IVA_SS_DMA_3:
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case OMAP_L3_IA_IVA_SS_DMA_4:
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case OMAP_L3_IA_IVA_SS_DMA_5:
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case OMAP_L3_IA_IVA_SS_DMA_6:
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return "IVA_SS_DMA";
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case OMAP_L3_IA_SGX:
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return "SGX";
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case OMAP_L3_IA_CAM_1:
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case OMAP_L3_IA_CAM_2:
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case OMAP_L3_IA_CAM_3:
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return "CAM";
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case OMAP_L3_IA_DAP:
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return "DAP";
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case OMAP_L3_SDMA_WR_1:
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case OMAP_L3_SDMA_WR_2:
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return "SDMA_WR";
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case OMAP_L3_SDMA_RD_1:
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case OMAP_L3_SDMA_RD_2:
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case OMAP_L3_SDMA_RD_3:
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case OMAP_L3_SDMA_RD_4:
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return "SDMA_RD";
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case OMAP_L3_USBOTG:
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return "USB_OTG";
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case OMAP_L3_USBHOST:
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return "USB_HOST";
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default:
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return "UNKNOWN Initiator";
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}
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}
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/*
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* omap3_l3_block_irq - handles a register block's irq
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* @l3: struct omap3_l3 *
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* @base: register block base address
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* @error: L3_ERROR_LOG register of our block
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*
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* Called in hard-irq context. Caller should take care of locking
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*
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* OMAP36xx TRM gives, on page 2001, Figure 9-10, the Typical Error
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* Analysis Sequence, we are following that sequence here, please
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* refer to that Figure for more information on the subject.
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*/
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static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3,
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u64 error, int error_addr)
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{
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u8 code = omap3_l3_decode_error_code(error);
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u8 initid = omap3_l3_decode_initid(error);
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u8 multi = error & L3_ERROR_LOG_MULTI;
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u32 address = omap3_l3_decode_addr(error_addr);
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pr_err("%s seen by %s %s at address %x\n",
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omap3_l3_code_string(code),
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omap3_l3_initiator_string(initid),
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multi ? "Multiple Errors" : "", address);
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WARN_ON(1);
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return IRQ_HANDLED;
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}
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static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
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{
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struct omap3_l3 *l3 = _l3;
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u64 status, clear;
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u64 error;
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u64 error_addr;
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u64 err_source = 0;
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void __iomem *base;
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int int_type;
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irqreturn_t ret = IRQ_NONE;
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int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
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if (!int_type) {
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status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_0);
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/*
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* if we have a timeout error, there's nothing we can
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* do besides rebooting the board. So let's BUG on any
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* of such errors and handle the others. timeout error
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* is severe and not expected to occur.
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*/
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BUG_ON(status & L3_STATUS_0_TIMEOUT_MASK);
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} else {
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status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_1);
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/* No timeout error for debug sources */
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}
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/* identify the error source */
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err_source = __ffs(status);
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base = l3->rt + omap3_l3_bases[int_type][err_source];
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error = omap3_l3_readll(base, L3_ERROR_LOG);
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if (error) {
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error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR);
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ret |= omap3_l3_block_irq(l3, error, error_addr);
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}
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/* Clear the status register */
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clear = (L3_AGENT_STATUS_CLEAR_IA << int_type) |
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L3_AGENT_STATUS_CLEAR_TA;
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omap3_l3_writell(base, L3_AGENT_STATUS, clear);
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/* clear the error log register */
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omap3_l3_writell(base, L3_ERROR_LOG, error);
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return ret;
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}
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static int __init omap3_l3_probe(struct platform_device *pdev)
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{
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struct omap3_l3 *l3;
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struct resource *res;
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int ret;
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l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
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if (!l3)
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return -ENOMEM;
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platform_set_drvdata(pdev, l3);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "couldn't find resource\n");
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ret = -ENODEV;
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goto err0;
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}
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l3->rt = ioremap(res->start, resource_size(res));
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if (!l3->rt) {
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dev_err(&pdev->dev, "ioremap failed\n");
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ret = -ENOMEM;
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goto err0;
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}
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l3->debug_irq = platform_get_irq(pdev, 0);
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ret = request_irq(l3->debug_irq, omap3_l3_app_irq,
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IRQF_DISABLED | IRQF_TRIGGER_RISING,
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"l3-debug-irq", l3);
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if (ret) {
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dev_err(&pdev->dev, "couldn't request debug irq\n");
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goto err1;
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}
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l3->app_irq = platform_get_irq(pdev, 1);
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ret = request_irq(l3->app_irq, omap3_l3_app_irq,
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IRQF_DISABLED | IRQF_TRIGGER_RISING,
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"l3-app-irq", l3);
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if (ret) {
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dev_err(&pdev->dev, "couldn't request app irq\n");
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goto err2;
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}
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return 0;
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err2:
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free_irq(l3->debug_irq, l3);
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err1:
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iounmap(l3->rt);
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err0:
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kfree(l3);
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return ret;
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}
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static int __exit omap3_l3_remove(struct platform_device *pdev)
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{
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struct omap3_l3 *l3 = platform_get_drvdata(pdev);
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free_irq(l3->app_irq, l3);
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free_irq(l3->debug_irq, l3);
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iounmap(l3->rt);
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kfree(l3);
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return 0;
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}
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static struct platform_driver omap3_l3_driver = {
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.remove = __exit_p(omap3_l3_remove),
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.driver = {
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.name = "omap_l3_smx",
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},
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};
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static int __init omap3_l3_init(void)
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{
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return platform_driver_probe(&omap3_l3_driver, omap3_l3_probe);
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}
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postcore_initcall_sync(omap3_l3_init);
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static void __exit omap3_l3_exit(void)
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{
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platform_driver_unregister(&omap3_l3_driver);
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}
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module_exit(omap3_l3_exit);
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