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43d0b10f60
According to Microchip errata some combinations of date and month values may result in the date being reset to 1, even if the date is also written with the month (for example 31-07 or 31-08). As a workaround avoid writing date and month values within the same Write command. Instead, terminate the Write command after loading the date and begin a new command to write the month. In addition, disable the oscillator before loading the new values. This is done by ensuring both the ST and EXTOSC bits are cleared and waiting for the OSCON bit to clear. Signed-off-by: Emil Bartczak <emilbart@gmail.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
286 lines
6.7 KiB
C
286 lines
6.7 KiB
C
/*
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* SPI Driver for Microchip MCP795 RTC
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*
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* Copyright (C) Josef Gajdusek <atx@atx.name>
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*
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* based on other Linux RTC drivers
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*
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* Device datasheet:
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* http://ww1.microchip.com/downloads/en/DeviceDoc/22280A.pdf
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* */
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/printk.h>
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#include <linux/spi/spi.h>
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#include <linux/rtc.h>
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#include <linux/of.h>
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#include <linux/bcd.h>
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#include <linux/delay.h>
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/* MCP795 Instructions, see datasheet table 3-1 */
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#define MCP795_EEREAD 0x03
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#define MCP795_EEWRITE 0x02
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#define MCP795_EEWRDI 0x04
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#define MCP795_EEWREN 0x06
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#define MCP795_SRREAD 0x05
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#define MCP795_SRWRITE 0x01
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#define MCP795_READ 0x13
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#define MCP795_WRITE 0x12
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#define MCP795_UNLOCK 0x14
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#define MCP795_IDWRITE 0x32
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#define MCP795_IDREAD 0x33
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#define MCP795_CLRWDT 0x44
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#define MCP795_CLRRAM 0x54
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/* MCP795 RTCC registers, see datasheet table 4-1 */
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#define MCP795_REG_SECONDS 0x01
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#define MCP795_REG_DAY 0x04
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#define MCP795_REG_MONTH 0x06
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#define MCP795_REG_CONTROL 0x08
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#define MCP795_ST_BIT 0x80
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#define MCP795_24_BIT 0x40
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#define MCP795_LP_BIT BIT(5)
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#define MCP795_EXTOSC_BIT BIT(3)
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#define MCP795_OSCON_BIT BIT(5)
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static int mcp795_rtcc_read(struct device *dev, u8 addr, u8 *buf, u8 count)
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{
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struct spi_device *spi = to_spi_device(dev);
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int ret;
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u8 tx[2];
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tx[0] = MCP795_READ;
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tx[1] = addr;
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ret = spi_write_then_read(spi, tx, sizeof(tx), buf, count);
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if (ret)
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dev_err(dev, "Failed reading %d bytes from address %x.\n",
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count, addr);
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return ret;
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}
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static int mcp795_rtcc_write(struct device *dev, u8 addr, u8 *data, u8 count)
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{
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struct spi_device *spi = to_spi_device(dev);
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int ret;
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u8 tx[2 + count];
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tx[0] = MCP795_WRITE;
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tx[1] = addr;
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memcpy(&tx[2], data, count);
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ret = spi_write(spi, tx, 2 + count);
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if (ret)
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dev_err(dev, "Failed to write %d bytes to address %x.\n",
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count, addr);
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return ret;
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}
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static int mcp795_rtcc_set_bits(struct device *dev, u8 addr, u8 mask, u8 state)
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{
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int ret;
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u8 tmp;
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ret = mcp795_rtcc_read(dev, addr, &tmp, 1);
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if (ret)
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return ret;
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if ((tmp & mask) != state) {
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tmp = (tmp & ~mask) | state;
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ret = mcp795_rtcc_write(dev, addr, &tmp, 1);
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}
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return ret;
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}
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static int mcp795_stop_oscillator(struct device *dev, bool *extosc)
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{
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int retries = 5;
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int ret;
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u8 data;
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ret = mcp795_rtcc_set_bits(dev, MCP795_REG_SECONDS, MCP795_ST_BIT, 0);
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if (ret)
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return ret;
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ret = mcp795_rtcc_read(dev, MCP795_REG_CONTROL, &data, 1);
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if (ret)
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return ret;
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*extosc = !!(data & MCP795_EXTOSC_BIT);
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ret = mcp795_rtcc_set_bits(
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dev, MCP795_REG_CONTROL, MCP795_EXTOSC_BIT, 0);
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if (ret)
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return ret;
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/* wait for the OSCON bit to clear */
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do {
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usleep_range(700, 800);
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ret = mcp795_rtcc_read(dev, MCP795_REG_DAY, &data, 1);
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if (ret)
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break;
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if (!(data & MCP795_OSCON_BIT))
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break;
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} while (--retries);
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return !retries ? -EIO : ret;
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}
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static int mcp795_start_oscillator(struct device *dev, bool *extosc)
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{
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if (extosc) {
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u8 data = *extosc ? MCP795_EXTOSC_BIT : 0;
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int ret;
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ret = mcp795_rtcc_set_bits(
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dev, MCP795_REG_CONTROL, MCP795_EXTOSC_BIT, data);
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if (ret)
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return ret;
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}
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return mcp795_rtcc_set_bits(
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dev, MCP795_REG_SECONDS, MCP795_ST_BIT, MCP795_ST_BIT);
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}
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static int mcp795_set_time(struct device *dev, struct rtc_time *tim)
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{
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int ret;
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u8 data[7];
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bool extosc;
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/* Stop RTC and store current value of EXTOSC bit */
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ret = mcp795_stop_oscillator(dev, &extosc);
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if (ret)
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return ret;
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/* Read first, so we can leave config bits untouched */
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ret = mcp795_rtcc_read(dev, MCP795_REG_SECONDS, data, sizeof(data));
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if (ret)
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return ret;
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data[0] = (data[0] & 0x80) | bin2bcd(tim->tm_sec);
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data[1] = (data[1] & 0x80) | bin2bcd(tim->tm_min);
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data[2] = bin2bcd(tim->tm_hour);
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data[4] = bin2bcd(tim->tm_mday);
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data[5] = (data[5] & MCP795_LP_BIT) | bin2bcd(tim->tm_mon + 1);
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if (tim->tm_year > 100)
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tim->tm_year -= 100;
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data[6] = bin2bcd(tim->tm_year);
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/* Always write the date and month using a separate Write command.
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* This is a workaround for a know silicon issue that some combinations
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* of date and month values may result in the date being reset to 1.
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*/
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ret = mcp795_rtcc_write(dev, MCP795_REG_SECONDS, data, 5);
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if (ret)
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return ret;
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ret = mcp795_rtcc_write(dev, MCP795_REG_MONTH, &data[5], 2);
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if (ret)
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return ret;
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/* Start back RTC and restore previous value of EXTOSC bit.
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* There is no need to clear EXTOSC bit when the previous value was 0
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* because it was already cleared when stopping the RTC oscillator.
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*/
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ret = mcp795_start_oscillator(dev, extosc ? &extosc : NULL);
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if (ret)
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return ret;
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dev_dbg(dev, "Set mcp795: %04d-%02d-%02d %02d:%02d:%02d\n",
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tim->tm_year + 1900, tim->tm_mon, tim->tm_mday,
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tim->tm_hour, tim->tm_min, tim->tm_sec);
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return 0;
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}
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static int mcp795_read_time(struct device *dev, struct rtc_time *tim)
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{
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int ret;
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u8 data[7];
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ret = mcp795_rtcc_read(dev, MCP795_REG_SECONDS, data, sizeof(data));
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if (ret)
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return ret;
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tim->tm_sec = bcd2bin(data[0] & 0x7F);
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tim->tm_min = bcd2bin(data[1] & 0x7F);
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tim->tm_hour = bcd2bin(data[2] & 0x3F);
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tim->tm_mday = bcd2bin(data[4] & 0x3F);
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tim->tm_mon = bcd2bin(data[5] & 0x1F) - 1;
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tim->tm_year = bcd2bin(data[6]) + 100; /* Assume we are in 20xx */
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dev_dbg(dev, "Read from mcp795: %04d-%02d-%02d %02d:%02d:%02d\n",
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tim->tm_year + 1900, tim->tm_mon, tim->tm_mday,
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tim->tm_hour, tim->tm_min, tim->tm_sec);
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return rtc_valid_tm(tim);
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}
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static const struct rtc_class_ops mcp795_rtc_ops = {
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.read_time = mcp795_read_time,
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.set_time = mcp795_set_time
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};
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static int mcp795_probe(struct spi_device *spi)
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{
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struct rtc_device *rtc;
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int ret;
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spi->mode = SPI_MODE_0;
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spi->bits_per_word = 8;
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ret = spi_setup(spi);
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if (ret) {
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dev_err(&spi->dev, "Unable to setup SPI\n");
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return ret;
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}
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/* Start the oscillator but don't set the value of EXTOSC bit */
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mcp795_start_oscillator(&spi->dev, NULL);
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/* Clear the 12 hour mode flag*/
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mcp795_rtcc_set_bits(&spi->dev, 0x03, MCP795_24_BIT, 0);
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rtc = devm_rtc_device_register(&spi->dev, "rtc-mcp795",
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&mcp795_rtc_ops, THIS_MODULE);
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if (IS_ERR(rtc))
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return PTR_ERR(rtc);
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spi_set_drvdata(spi, rtc);
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id mcp795_of_match[] = {
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{ .compatible = "maxim,mcp795" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, mcp795_of_match);
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#endif
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static struct spi_driver mcp795_driver = {
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.driver = {
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.name = "rtc-mcp795",
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.of_match_table = of_match_ptr(mcp795_of_match),
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},
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.probe = mcp795_probe,
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};
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module_spi_driver(mcp795_driver);
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MODULE_DESCRIPTION("MCP795 RTC SPI Driver");
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MODULE_AUTHOR("Josef Gajdusek <atx@atx.name>");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("spi:mcp795");
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