mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 17:30:02 +00:00
![Linus Torvalds](/assets/img/avatar_default.png)
There's a bunch of fixes/cleanups throughout the tree as usual, but we also have a handful of new features. * Various improvements to the extension detection and alternative patching infrastructure. * Zbb-optimized string routines. * Support for cpu-capacity in the RISC-V DT bindings. * Zicbom no longer depends on toolchain support. * Some performance and code size improvements to ftrace. * Support for ARCH_WANT_LD_ORPHAN_WARN. * Oops now contain the faulting instruction. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmP49coTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiTFnEACuQtGJWSwzH+ORswVyItKzqHcBMU3t rWHTFxQ7MdWgQO8nrWUtSypGY4n0DFTCe9w4H3tQFRDaTXbI+ycFjidEDt3eJCMb n6WiGuZpdKVS81CQ0Es4dTWQ1i/28fe1851CGK/PkybXdrPPofdCJ9k3Wepxflb/ 2UYxRDyjKt3KbJ2OmN2oF8Ek1rrsGhIC/Dhbdb2JsGZhYF10ZYjquaOLs31WbHMG O+n/N/JfZRAif1MDQ71ygAm9KV0kGqe/wcRtsJGETwJ8U3I/cjn2mAGd8BRdy4iL 9GFmTmi8q27ntUbakikNz3b4aE9xVnLDvRIyOciI3l8rQjrFAsfnQbuRwlaq6BVJ BF3e6nAjkcLj23FhbROTlfncEOzrklbNZ+uQIuvyffAUjDoePw9x7o0r+qj7FnOY WMfNecJMeE5OGVBqHSVFEcAMlN6uYu6wqbEipEpc+8sTg+w1LM0bUVNhV86/BrnL bh+4+7MPYtg45vy2Y8AuPUBFqR2uCekDpbxciCEGsaIzUYRas2zrt9UkWGjKs1VV q0qeLSNNA1wBq+q6FprTceipFQIqD5KnmI2GMucF6v4YFg5AzeSOpRc6aeqcs7Z2 +ApShSOFPjjntZbcpTgkvhrPExr0Jel0xY7YSazUUqY0xOHUwGNBEh/E4rzsRLxr qvUpFAIZT60dfQ== =XgYl -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.3-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Palmer Dabbelt: "There's a bunch of fixes/cleanups throughout the tree as usual, but we also have a handful of new features: - Various improvements to the extension detection and alternative patching infrastructure - Zbb-optimized string routines - Support for cpu-capacity in the RISC-V DT bindings - Zicbom no longer depends on toolchain support - Some performance and code size improvements to ftrace - Support for ARCH_WANT_LD_ORPHAN_WARN - Oops now contain the faulting instruction" * tag 'riscv-for-linus-6.3-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (67 commits) RISC-V: add a spin_shadow_stack declaration riscv: mm: hugetlb: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP riscv: Add header include guards to insn.h riscv: alternative: proceed one more instruction for auipc/jalr pair riscv: Avoid enabling interrupts in die() riscv, mm: Perform BPF exhandler fixup on page fault RISC-V: take text_mutex during alternative patching riscv: hwcap: Don't alphabetize ISA extension IDs RISC-V: fix ordering of Zbb extension riscv: jump_label: Fixup unaligned arch_static_branch function RISC-V: Only provide the single-letter extensions in HWCAP riscv: mm: fix regression due to update_mmu_cache change scripts/decodecode: Add support for RISC-V riscv: Add instruction dump to RISC-V splats riscv: select ARCH_WANT_LD_ORPHAN_WARN for !XIP_KERNEL riscv: vmlinux.lds.S: explicitly catch .init.bss sections from EFI stub riscv: vmlinux.lds.S: explicitly catch .riscv.attributes sections riscv: vmlinux.lds.S: explicitly catch .rela.dyn symbols riscv: lds: define RUNTIME_DISCARD_EXIT RISC-V: move some stray __RISCV_INSN_FUNCS definitions from kprobes ...
106 lines
2.5 KiB
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106 lines
2.5 KiB
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menu "SoC selection"
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config ARCH_MICROCHIP_POLARFIRE
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def_bool SOC_MICROCHIP_POLARFIRE
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config SOC_MICROCHIP_POLARFIRE
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bool "Microchip PolarFire SoCs"
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help
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This enables support for Microchip PolarFire SoC platforms.
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config ARCH_RENESAS
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bool "Renesas RISC-V SoCs"
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help
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This enables support for the RISC-V based Renesas SoCs.
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config ARCH_SIFIVE
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def_bool SOC_SIFIVE
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config SOC_SIFIVE
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bool "SiFive SoCs"
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select ERRATA_SIFIVE if !XIP_KERNEL
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help
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This enables support for SiFive SoC platform hardware.
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config ARCH_STARFIVE
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def_bool SOC_STARFIVE
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config SOC_STARFIVE
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bool "StarFive SoCs"
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select PINCTRL
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select RESET_CONTROLLER
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help
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This enables support for StarFive SoC platform hardware.
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config ARCH_SUNXI
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bool "Allwinner sun20i SoCs"
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depends on MMU && !XIP_KERNEL
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select ERRATA_THEAD
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select SUN4I_TIMER
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help
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This enables support for Allwinner sun20i platform hardware,
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including boards based on the D1 and D1s SoCs.
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config ARCH_VIRT
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def_bool SOC_VIRT
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config SOC_VIRT
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bool "QEMU Virt Machine"
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select CLINT_TIMER if RISCV_M_MODE
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select POWER_RESET
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select POWER_RESET_SYSCON
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select POWER_RESET_SYSCON_POWEROFF
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select GOLDFISH
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select RTC_DRV_GOLDFISH if RTC_CLASS
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select PM_GENERIC_DOMAINS if PM
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select PM_GENERIC_DOMAINS_OF if PM && OF
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select RISCV_SBI_CPUIDLE if CPU_IDLE && RISCV_SBI
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help
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This enables support for QEMU Virt Machine.
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config ARCH_CANAAN
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def_bool SOC_CANAAN
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config SOC_CANAAN
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bool "Canaan Kendryte K210 SoC"
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depends on !MMU
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select CLINT_TIMER if RISCV_M_MODE
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select ARCH_HAS_RESET_CONTROLLER
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select PINCTRL
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select COMMON_CLK
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help
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This enables support for Canaan Kendryte K210 SoC platform hardware.
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if ARCH_CANAAN
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config ARCH_CANAAN_K210_DTB_BUILTIN
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def_bool SOC_CANAAN_K210_DTB_BUILTIN
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config SOC_CANAAN_K210_DTB_BUILTIN
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bool "Builtin device tree for the Canaan Kendryte K210"
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depends on ARCH_CANAAN
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default y
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select OF
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select BUILTIN_DTB
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help
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Build a device tree for the Kendryte K210 into the Linux image.
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This option should be selected if no bootloader is being used.
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If unsure, say Y.
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config ARCH_CANAAN_K210_DTB_SOURCE
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string
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default SOC_CANAAN_K210_DTB_SOURCE
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config SOC_CANAAN_K210_DTB_SOURCE
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string "Source file for the Canaan Kendryte K210 builtin DTB"
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depends on ARCH_CANAAN
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depends on ARCH_CANAAN_K210_DTB_BUILTIN
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default "k210_generic"
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help
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Base name (without suffix, relative to arch/riscv/boot/dts/canaan)
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for the DTS file that will be used to produce the DTB linked into the
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kernel.
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endif # ARCH_CANAAN
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endmenu # "SoC selection"
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