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47c6f8a67f
At the SFDP parsing time we should not change members of struct spi_nor, but instead fill members of struct spi_nor_flash_parameters which could later on be used by callers. The caller will then decide if SFDP params should be used and more importantly when they should be used. Clean the code flow and don't initialize nor->addr_nbytes at SFDP parsing time. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20220725092505.446315-4-tudor.ambarus@microchip.com
105 lines
3.3 KiB
C
105 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2005, Intec Automation Inc.
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* Copyright (C) 2014, Freescale Semiconductor, Inc.
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*/
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#include <linux/mtd/spi-nor.h>
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#include "core.h"
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static int
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is25lp256_post_bfpt_fixups(struct spi_nor *nor,
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const struct sfdp_parameter_header *bfpt_header,
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const struct sfdp_bfpt *bfpt)
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{
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/*
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* IS25LP256 supports 4B opcodes, but the BFPT advertises
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* BFPT_DWORD1_ADDRESS_BYTES_3_ONLY.
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* Overwrite the number of address bytes advertised by the BFPT.
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*/
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if ((bfpt->dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) ==
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BFPT_DWORD1_ADDRESS_BYTES_3_ONLY)
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nor->params->addr_nbytes = 4;
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return 0;
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}
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static const struct spi_nor_fixups is25lp256_fixups = {
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.post_bfpt = is25lp256_post_bfpt_fixups,
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};
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static void pm25lv_nor_late_init(struct spi_nor *nor)
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{
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struct spi_nor_erase_map *map = &nor->params->erase_map;
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int i;
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/* The PM25LV series has a different 4k sector erase opcode */
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for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
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if (map->erase_type[i].size == 4096)
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map->erase_type[i].opcode = SPINOR_OP_BE_4K_PMC;
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}
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static const struct spi_nor_fixups pm25lv_nor_fixups = {
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.late_init = pm25lv_nor_late_init,
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};
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static const struct flash_info issi_nor_parts[] = {
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/* ISSI */
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{ "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2)
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NO_SFDP_FLAGS(SECT_4K) },
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{ "is25lq040b", INFO(0x9d4013, 0, 64 * 1024, 8)
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NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "is25lp016d", INFO(0x9d6015, 0, 64 * 1024, 32)
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NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "is25lp080d", INFO(0x9d6014, 0, 64 * 1024, 16)
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NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "is25lp032", INFO(0x9d6016, 0, 64 * 1024, 64)
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NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) },
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{ "is25lp064", INFO(0x9d6017, 0, 64 * 1024, 128)
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NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) },
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{ "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256)
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NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) },
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{ "is25lp256", INFO(0x9d6019, 0, 64 * 1024, 512)
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PARSE_SFDP
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FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
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.fixups = &is25lp256_fixups },
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{ "is25wp032", INFO(0x9d7016, 0, 64 * 1024, 64)
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NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "is25wp064", INFO(0x9d7017, 0, 64 * 1024, 128)
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NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "is25wp128", INFO(0x9d7018, 0, 64 * 1024, 256)
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NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "is25wp256", INFO(0x9d7019, 0, 64 * 1024, 512)
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NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
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FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
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.fixups = &is25lp256_fixups },
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/* PMC */
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{ "pm25lv512", INFO(0, 0, 32 * 1024, 2)
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NO_SFDP_FLAGS(SECT_4K)
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.fixups = &pm25lv_nor_fixups
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},
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{ "pm25lv010", INFO(0, 0, 32 * 1024, 4)
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NO_SFDP_FLAGS(SECT_4K)
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.fixups = &pm25lv_nor_fixups
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},
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{ "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024, 64)
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NO_SFDP_FLAGS(SECT_4K) },
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};
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static void issi_nor_default_init(struct spi_nor *nor)
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{
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nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
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}
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static const struct spi_nor_fixups issi_fixups = {
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.default_init = issi_nor_default_init,
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};
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const struct spi_nor_manufacturer spi_nor_issi = {
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.name = "issi",
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.parts = issi_nor_parts,
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.nparts = ARRAY_SIZE(issi_nor_parts),
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.fixups = &issi_fixups,
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};
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