mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-12 21:57:43 +00:00
450889074f
The PHY registers happens to be at the beginning of a large zone containing interleaved system registers (mainly clocks, power management, PHY control..), found in all Amlogic SoC so far. The goal is to model it the same way as the other "features" of this zone, like Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt and Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml and have a coherent bindings scheme over the Amlogic SoCs. This update the description, removed the reg attribute then updates the example accordingly. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201116101647.73448-2-narmstrong@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org> |
||
|---|---|---|
| .. | ||
| bindings | ||
| changesets.rst | ||
| dynamic-resolution-notes.rst | ||
| index.rst | ||
| of_unittest.rst | ||
| overlay-notes.rst | ||
| usage-model.rst | ||
| writing-schema.rst | ||