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![Takashi Iwai](/assets/img/avatar_default.png)
Instead of open-code, use the new standard helper to manage vmaster stuff for code simplification. Also, handle the errors from the helper more properly instead of silently ignoring. The code changes the call order of snd_ctl_add() of the vmaster object and its followers for avoiding the possible memory leaks at error path. But there should be no difference in the functionality. Link: https://lore.kernel.org/r/20230721071643.3631-5-tiwai@suse.de Signed-off-by: Takashi Iwai <tiwai@suse.de>
662 lines
19 KiB
C
662 lines
19 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* ALSA driver for ICEnsemble VT1724 (Envy24HT)
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*
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* Lowlevel functions for ESI Juli@ cards
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*
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* Copyright (c) 2004 Jaroslav Kysela <perex@perex.cz>
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* 2008 Pavel Hofman <dustin@seznam.cz>
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*/
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <sound/core.h>
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#include <sound/tlv.h>
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#include "ice1712.h"
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#include "envy24ht.h"
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#include "juli.h"
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struct juli_spec {
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struct ak4114 *ak4114;
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unsigned int analog:1;
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};
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/*
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* chip addresses on I2C bus
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*/
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#define AK4114_ADDR 0x20 /* S/PDIF receiver */
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#define AK4358_ADDR 0x22 /* DAC */
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/*
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* Juli does not use the standard ICE1724 clock scheme. Juli's ice1724 chip is
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* supplied by external clock provided by Xilinx array and MK73-1 PLL frequency
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* multiplier. Actual frequency is set by ice1724 GPIOs hooked to the Xilinx.
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*
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* The clock circuitry is supplied by the two ice1724 crystals. This
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* arrangement allows to generate independent clock signal for AK4114's input
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* rate detection circuit. As a result, Juli, unlike most other
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* ice1724+ak4114-based cards, detects spdif input rate correctly.
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* This fact is applied in the driver, allowing to modify PCM stream rate
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* parameter according to the actual input rate.
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*
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* Juli uses the remaining three stereo-channels of its DAC to optionally
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* monitor analog input, digital input, and digital output. The corresponding
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* I2S signals are routed by Xilinx, controlled by GPIOs.
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*
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* The master mute is implemented using output muting transistors (GPIO) in
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* combination with smuting the DAC.
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*
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* The card itself has no HW master volume control, implemented using the
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* vmaster control.
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*
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* TODO:
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* researching and fixing the input monitors
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*/
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/*
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* GPIO pins
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*/
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#define GPIO_FREQ_MASK (3<<0)
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#define GPIO_FREQ_32KHZ (0<<0)
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#define GPIO_FREQ_44KHZ (1<<0)
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#define GPIO_FREQ_48KHZ (2<<0)
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#define GPIO_MULTI_MASK (3<<2)
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#define GPIO_MULTI_4X (0<<2)
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#define GPIO_MULTI_2X (1<<2)
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#define GPIO_MULTI_1X (2<<2) /* also external */
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#define GPIO_MULTI_HALF (3<<2)
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#define GPIO_INTERNAL_CLOCK (1<<4) /* 0 = external, 1 = internal */
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#define GPIO_CLOCK_MASK (1<<4)
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#define GPIO_ANALOG_PRESENT (1<<5) /* RO only: 0 = present */
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#define GPIO_RXMCLK_SEL (1<<7) /* must be 0 */
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#define GPIO_AK5385A_CKS0 (1<<8)
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#define GPIO_AK5385A_DFS1 (1<<9)
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#define GPIO_AK5385A_DFS0 (1<<10)
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#define GPIO_DIGOUT_MONITOR (1<<11) /* 1 = active */
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#define GPIO_DIGIN_MONITOR (1<<12) /* 1 = active */
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#define GPIO_ANAIN_MONITOR (1<<13) /* 1 = active */
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#define GPIO_AK5385A_CKS1 (1<<14) /* must be 0 */
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#define GPIO_MUTE_CONTROL (1<<15) /* output mute, 1 = muted */
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#define GPIO_RATE_MASK (GPIO_FREQ_MASK | GPIO_MULTI_MASK | \
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GPIO_CLOCK_MASK)
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#define GPIO_AK5385A_MASK (GPIO_AK5385A_CKS0 | GPIO_AK5385A_DFS0 | \
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GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS1)
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#define JULI_PCM_RATE (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
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SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
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SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
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SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \
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SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
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#define GPIO_RATE_16000 (GPIO_FREQ_32KHZ | GPIO_MULTI_HALF | \
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GPIO_INTERNAL_CLOCK)
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#define GPIO_RATE_22050 (GPIO_FREQ_44KHZ | GPIO_MULTI_HALF | \
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GPIO_INTERNAL_CLOCK)
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#define GPIO_RATE_24000 (GPIO_FREQ_48KHZ | GPIO_MULTI_HALF | \
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GPIO_INTERNAL_CLOCK)
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#define GPIO_RATE_32000 (GPIO_FREQ_32KHZ | GPIO_MULTI_1X | \
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GPIO_INTERNAL_CLOCK)
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#define GPIO_RATE_44100 (GPIO_FREQ_44KHZ | GPIO_MULTI_1X | \
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GPIO_INTERNAL_CLOCK)
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#define GPIO_RATE_48000 (GPIO_FREQ_48KHZ | GPIO_MULTI_1X | \
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GPIO_INTERNAL_CLOCK)
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#define GPIO_RATE_64000 (GPIO_FREQ_32KHZ | GPIO_MULTI_2X | \
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GPIO_INTERNAL_CLOCK)
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#define GPIO_RATE_88200 (GPIO_FREQ_44KHZ | GPIO_MULTI_2X | \
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GPIO_INTERNAL_CLOCK)
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#define GPIO_RATE_96000 (GPIO_FREQ_48KHZ | GPIO_MULTI_2X | \
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GPIO_INTERNAL_CLOCK)
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#define GPIO_RATE_176400 (GPIO_FREQ_44KHZ | GPIO_MULTI_4X | \
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GPIO_INTERNAL_CLOCK)
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#define GPIO_RATE_192000 (GPIO_FREQ_48KHZ | GPIO_MULTI_4X | \
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GPIO_INTERNAL_CLOCK)
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/*
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* Initial setup of the conversion array GPIO <-> rate
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*/
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static const unsigned int juli_rates[] = {
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16000, 22050, 24000, 32000,
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44100, 48000, 64000, 88200,
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96000, 176400, 192000,
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};
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static const unsigned int gpio_vals[] = {
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GPIO_RATE_16000, GPIO_RATE_22050, GPIO_RATE_24000, GPIO_RATE_32000,
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GPIO_RATE_44100, GPIO_RATE_48000, GPIO_RATE_64000, GPIO_RATE_88200,
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GPIO_RATE_96000, GPIO_RATE_176400, GPIO_RATE_192000,
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};
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static const struct snd_pcm_hw_constraint_list juli_rates_info = {
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.count = ARRAY_SIZE(juli_rates),
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.list = juli_rates,
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.mask = 0,
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};
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static int get_gpio_val(int rate)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(juli_rates); i++)
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if (juli_rates[i] == rate)
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return gpio_vals[i];
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return 0;
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}
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static void juli_ak4114_write(void *private_data, unsigned char reg,
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unsigned char val)
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{
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snd_vt1724_write_i2c((struct snd_ice1712 *)private_data, AK4114_ADDR,
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reg, val);
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}
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static unsigned char juli_ak4114_read(void *private_data, unsigned char reg)
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{
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return snd_vt1724_read_i2c((struct snd_ice1712 *)private_data,
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AK4114_ADDR, reg);
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}
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/*
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* If SPDIF capture and slaved to SPDIF-IN, setting runtime rate
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* to the external rate
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*/
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static void juli_spdif_in_open(struct snd_ice1712 *ice,
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struct snd_pcm_substream *substream)
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{
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struct juli_spec *spec = ice->spec;
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struct snd_pcm_runtime *runtime = substream->runtime;
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int rate;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ||
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!ice->is_spdif_master(ice))
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return;
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rate = snd_ak4114_external_rate(spec->ak4114);
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if (rate >= runtime->hw.rate_min && rate <= runtime->hw.rate_max) {
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runtime->hw.rate_min = rate;
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runtime->hw.rate_max = rate;
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}
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}
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/*
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* AK4358 section
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*/
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static void juli_akm_lock(struct snd_akm4xxx *ak, int chip)
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{
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}
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static void juli_akm_unlock(struct snd_akm4xxx *ak, int chip)
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{
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}
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static void juli_akm_write(struct snd_akm4xxx *ak, int chip,
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unsigned char addr, unsigned char data)
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{
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struct snd_ice1712 *ice = ak->private_data[0];
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if (snd_BUG_ON(chip))
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return;
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snd_vt1724_write_i2c(ice, AK4358_ADDR, addr, data);
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}
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/*
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* change the rate of envy24HT, AK4358, AK5385
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*/
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static void juli_akm_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
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{
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unsigned char old, tmp, ak4358_dfs;
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unsigned int ak5385_pins, old_gpio, new_gpio;
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struct snd_ice1712 *ice = ak->private_data[0];
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struct juli_spec *spec = ice->spec;
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if (rate == 0) /* no hint - S/PDIF input is master or the new spdif
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input rate undetected, simply return */
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return;
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/* adjust DFS on codecs */
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if (rate > 96000) {
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ak4358_dfs = 2;
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ak5385_pins = GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS0;
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} else if (rate > 48000) {
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ak4358_dfs = 1;
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ak5385_pins = GPIO_AK5385A_DFS0;
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} else {
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ak4358_dfs = 0;
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ak5385_pins = 0;
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}
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/* AK5385 first, since it requires cold reset affecting both codecs */
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old_gpio = ice->gpio.get_data(ice);
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new_gpio = (old_gpio & ~GPIO_AK5385A_MASK) | ak5385_pins;
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/* dev_dbg(ice->card->dev, "JULI - ak5385 set_rate_val: new gpio 0x%x\n",
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new_gpio); */
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ice->gpio.set_data(ice, new_gpio);
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/* cold reset */
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old = inb(ICEMT1724(ice, AC97_CMD));
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outb(old | VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
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udelay(1);
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outb(old & ~VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
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/* AK4358 */
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/* set new value, reset DFS */
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tmp = snd_akm4xxx_get(ak, 0, 2);
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snd_akm4xxx_reset(ak, 1);
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tmp = snd_akm4xxx_get(ak, 0, 2);
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tmp &= ~(0x03 << 4);
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tmp |= ak4358_dfs << 4;
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snd_akm4xxx_set(ak, 0, 2, tmp);
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snd_akm4xxx_reset(ak, 0);
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/* reinit ak4114 */
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snd_ak4114_reinit(spec->ak4114);
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}
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#define AK_DAC(xname, xch) { .name = xname, .num_channels = xch }
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#define PCM_VOLUME "PCM Playback Volume"
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#define MONITOR_AN_IN_VOLUME "Monitor Analog In Volume"
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#define MONITOR_DIG_IN_VOLUME "Monitor Digital In Volume"
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#define MONITOR_DIG_OUT_VOLUME "Monitor Digital Out Volume"
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static const struct snd_akm4xxx_dac_channel juli_dac[] = {
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AK_DAC(PCM_VOLUME, 2),
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AK_DAC(MONITOR_AN_IN_VOLUME, 2),
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AK_DAC(MONITOR_DIG_OUT_VOLUME, 2),
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AK_DAC(MONITOR_DIG_IN_VOLUME, 2),
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};
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static const struct snd_akm4xxx akm_juli_dac = {
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.type = SND_AK4358,
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.num_dacs = 8, /* DAC1 - analog out
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DAC2 - analog in monitor
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DAC3 - digital out monitor
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DAC4 - digital in monitor
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*/
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.ops = {
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.lock = juli_akm_lock,
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.unlock = juli_akm_unlock,
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.write = juli_akm_write,
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.set_rate_val = juli_akm_set_rate_val
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},
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.dac_info = juli_dac,
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};
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#define juli_mute_info snd_ctl_boolean_mono_info
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static int juli_mute_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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unsigned int val;
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val = ice->gpio.get_data(ice) & (unsigned int) kcontrol->private_value;
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if (kcontrol->private_value == GPIO_MUTE_CONTROL)
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/* val 0 = signal on */
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ucontrol->value.integer.value[0] = (val) ? 0 : 1;
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else
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/* val 1 = signal on */
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ucontrol->value.integer.value[0] = (val) ? 1 : 0;
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return 0;
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}
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static int juli_mute_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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unsigned int old_gpio, new_gpio;
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old_gpio = ice->gpio.get_data(ice);
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if (ucontrol->value.integer.value[0]) {
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/* unmute */
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if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
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/* 0 = signal on */
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new_gpio = old_gpio & ~GPIO_MUTE_CONTROL;
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/* un-smuting DAC */
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snd_akm4xxx_write(ice->akm, 0, 0x01, 0x01);
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} else
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/* 1 = signal on */
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new_gpio = old_gpio |
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(unsigned int) kcontrol->private_value;
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} else {
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/* mute */
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if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
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/* 1 = signal off */
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new_gpio = old_gpio | GPIO_MUTE_CONTROL;
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/* smuting DAC */
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snd_akm4xxx_write(ice->akm, 0, 0x01, 0x03);
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} else
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/* 0 = signal off */
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new_gpio = old_gpio &
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~((unsigned int) kcontrol->private_value);
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}
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/* dev_dbg(ice->card->dev,
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"JULI - mute/unmute: control_value: 0x%x, old_gpio: 0x%x, "
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"new_gpio 0x%x\n",
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(unsigned int)ucontrol->value.integer.value[0], old_gpio,
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new_gpio); */
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if (old_gpio != new_gpio) {
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ice->gpio.set_data(ice, new_gpio);
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return 1;
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}
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/* no change */
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return 0;
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}
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static const struct snd_kcontrol_new juli_mute_controls[] = {
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{
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.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
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.name = "Master Playback Switch",
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.info = juli_mute_info,
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.get = juli_mute_get,
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.put = juli_mute_put,
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.private_value = GPIO_MUTE_CONTROL,
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},
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/* Although the following functionality respects the succint NDA'd
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* documentation from the card manufacturer, and the same way of
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* operation is coded in OSS Juli driver, only Digital Out monitor
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* seems to work. Surprisingly, Analog input monitor outputs Digital
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* output data. The two are independent, as enabling both doubles
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* volume of the monitor sound.
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*
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* Checking traces on the board suggests the functionality described
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* by the manufacturer is correct - I2S from ADC and AK4114
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* go to ICE as well as to Xilinx, I2S inputs of DAC2,3,4 (the monitor
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* inputs) are fed from Xilinx.
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*
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* I even checked traces on board and coded a support in driver for
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* an alternative possibility - the unused I2S ICE output channels
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* switched to HW-IN/SPDIF-IN and providing the monitoring signal to
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* the DAC - to no avail. The I2S outputs seem to be unconnected.
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*
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* The windows driver supports the monitoring correctly.
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*/
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{
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.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
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.name = "Monitor Analog In Switch",
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.info = juli_mute_info,
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.get = juli_mute_get,
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.put = juli_mute_put,
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.private_value = GPIO_ANAIN_MONITOR,
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},
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{
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.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
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.name = "Monitor Digital Out Switch",
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.info = juli_mute_info,
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.get = juli_mute_get,
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.put = juli_mute_put,
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.private_value = GPIO_DIGOUT_MONITOR,
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},
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{
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.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
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.name = "Monitor Digital In Switch",
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.info = juli_mute_info,
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.get = juli_mute_get,
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.put = juli_mute_put,
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.private_value = GPIO_DIGIN_MONITOR,
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},
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};
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static const char * const follower_vols[] = {
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PCM_VOLUME,
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MONITOR_AN_IN_VOLUME,
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MONITOR_DIG_IN_VOLUME,
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MONITOR_DIG_OUT_VOLUME,
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NULL
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};
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static
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DECLARE_TLV_DB_SCALE(juli_master_db_scale, -6350, 50, 1);
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static int juli_add_controls(struct snd_ice1712 *ice)
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{
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struct juli_spec *spec = ice->spec;
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int err;
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unsigned int i;
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struct snd_kcontrol *vmaster;
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err = snd_ice1712_akm4xxx_build_controls(ice);
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if (err < 0)
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return err;
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for (i = 0; i < ARRAY_SIZE(juli_mute_controls); i++) {
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err = snd_ctl_add(ice->card,
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snd_ctl_new1(&juli_mute_controls[i], ice));
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if (err < 0)
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return err;
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}
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/* Create virtual master control */
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vmaster = snd_ctl_make_virtual_master("Master Playback Volume",
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juli_master_db_scale);
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if (!vmaster)
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return -ENOMEM;
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err = snd_ctl_add(ice->card, vmaster);
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if (err < 0)
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return err;
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err = snd_ctl_add_followers(ice->card, vmaster, follower_vols);
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if (err < 0)
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return err;
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/* only capture SPDIF over AK4114 */
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return snd_ak4114_build(spec->ak4114, NULL,
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ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
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}
|
|
|
|
/*
|
|
* suspend/resume
|
|
* */
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int juli_resume(struct snd_ice1712 *ice)
|
|
{
|
|
struct snd_akm4xxx *ak = ice->akm;
|
|
struct juli_spec *spec = ice->spec;
|
|
/* akm4358 un-reset, un-mute */
|
|
snd_akm4xxx_reset(ak, 0);
|
|
/* reinit ak4114 */
|
|
snd_ak4114_resume(spec->ak4114);
|
|
return 0;
|
|
}
|
|
|
|
static int juli_suspend(struct snd_ice1712 *ice)
|
|
{
|
|
struct snd_akm4xxx *ak = ice->akm;
|
|
struct juli_spec *spec = ice->spec;
|
|
/* akm4358 reset and soft-mute */
|
|
snd_akm4xxx_reset(ak, 1);
|
|
snd_ak4114_suspend(spec->ak4114);
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* initialize the chip
|
|
*/
|
|
|
|
static inline int juli_is_spdif_master(struct snd_ice1712 *ice)
|
|
{
|
|
return (ice->gpio.get_data(ice) & GPIO_INTERNAL_CLOCK) ? 0 : 1;
|
|
}
|
|
|
|
static unsigned int juli_get_rate(struct snd_ice1712 *ice)
|
|
{
|
|
int i;
|
|
unsigned char result;
|
|
|
|
result = ice->gpio.get_data(ice) & GPIO_RATE_MASK;
|
|
for (i = 0; i < ARRAY_SIZE(gpio_vals); i++)
|
|
if (gpio_vals[i] == result)
|
|
return juli_rates[i];
|
|
return 0;
|
|
}
|
|
|
|
/* setting new rate */
|
|
static void juli_set_rate(struct snd_ice1712 *ice, unsigned int rate)
|
|
{
|
|
unsigned int old, new;
|
|
unsigned char val;
|
|
|
|
old = ice->gpio.get_data(ice);
|
|
new = (old & ~GPIO_RATE_MASK) | get_gpio_val(rate);
|
|
/* dev_dbg(ice->card->dev, "JULI - set_rate: old %x, new %x\n",
|
|
old & GPIO_RATE_MASK,
|
|
new & GPIO_RATE_MASK); */
|
|
|
|
ice->gpio.set_data(ice, new);
|
|
/* switching to external clock - supplied by external circuits */
|
|
val = inb(ICEMT1724(ice, RATE));
|
|
outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
|
|
}
|
|
|
|
static inline unsigned char juli_set_mclk(struct snd_ice1712 *ice,
|
|
unsigned int rate)
|
|
{
|
|
/* no change in master clock */
|
|
return 0;
|
|
}
|
|
|
|
/* setting clock to external - SPDIF */
|
|
static int juli_set_spdif_clock(struct snd_ice1712 *ice, int type)
|
|
{
|
|
unsigned int old;
|
|
old = ice->gpio.get_data(ice);
|
|
/* external clock (= 0), multiply 1x, 48kHz */
|
|
ice->gpio.set_data(ice, (old & ~GPIO_RATE_MASK) | GPIO_MULTI_1X |
|
|
GPIO_FREQ_48KHZ);
|
|
return 0;
|
|
}
|
|
|
|
/* Called when ak4114 detects change in the input SPDIF stream */
|
|
static void juli_ak4114_change(struct ak4114 *ak4114, unsigned char c0,
|
|
unsigned char c1)
|
|
{
|
|
struct snd_ice1712 *ice = ak4114->change_callback_private;
|
|
int rate;
|
|
if (ice->is_spdif_master(ice) && c1) {
|
|
/* only for SPDIF master mode, rate was changed */
|
|
rate = snd_ak4114_external_rate(ak4114);
|
|
/* dev_dbg(ice->card->dev, "ak4114 - input rate changed to %d\n",
|
|
rate); */
|
|
juli_akm_set_rate_val(ice->akm, rate);
|
|
}
|
|
}
|
|
|
|
static int juli_init(struct snd_ice1712 *ice)
|
|
{
|
|
static const unsigned char ak4114_init_vals[] = {
|
|
/* AK4117_REG_PWRDN */ AK4114_RST | AK4114_PWN |
|
|
AK4114_OCKS0 | AK4114_OCKS1,
|
|
/* AK4114_REQ_FORMAT */ AK4114_DIF_I24I2S,
|
|
/* AK4114_REG_IO0 */ AK4114_TX1E,
|
|
/* AK4114_REG_IO1 */ AK4114_EFH_1024 | AK4114_DIT |
|
|
AK4114_IPS(1),
|
|
/* AK4114_REG_INT0_MASK */ 0,
|
|
/* AK4114_REG_INT1_MASK */ 0
|
|
};
|
|
static const unsigned char ak4114_init_txcsb[] = {
|
|
0x41, 0x02, 0x2c, 0x00, 0x00
|
|
};
|
|
int err;
|
|
struct juli_spec *spec;
|
|
struct snd_akm4xxx *ak;
|
|
|
|
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
|
|
if (!spec)
|
|
return -ENOMEM;
|
|
ice->spec = spec;
|
|
|
|
err = snd_ak4114_create(ice->card,
|
|
juli_ak4114_read,
|
|
juli_ak4114_write,
|
|
ak4114_init_vals, ak4114_init_txcsb,
|
|
ice, &spec->ak4114);
|
|
if (err < 0)
|
|
return err;
|
|
/* callback for codecs rate setting */
|
|
spec->ak4114->change_callback = juli_ak4114_change;
|
|
spec->ak4114->change_callback_private = ice;
|
|
/* AK4114 in Juli can detect external rate correctly */
|
|
spec->ak4114->check_flags = 0;
|
|
|
|
#if 0
|
|
/*
|
|
* it seems that the analog doughter board detection does not work reliably, so
|
|
* force the analog flag; it should be very rare (if ever) to come at Juli@
|
|
* used without the analog daughter board
|
|
*/
|
|
spec->analog = (ice->gpio.get_data(ice) & GPIO_ANALOG_PRESENT) ? 0 : 1;
|
|
#else
|
|
spec->analog = 1;
|
|
#endif
|
|
|
|
if (spec->analog) {
|
|
dev_info(ice->card->dev, "juli@: analog I/O detected\n");
|
|
ice->num_total_dacs = 2;
|
|
ice->num_total_adcs = 2;
|
|
|
|
ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
|
|
ak = ice->akm;
|
|
if (!ak)
|
|
return -ENOMEM;
|
|
ice->akm_codecs = 1;
|
|
err = snd_ice1712_akm4xxx_init(ak, &akm_juli_dac, NULL, ice);
|
|
if (err < 0)
|
|
return err;
|
|
}
|
|
|
|
/* juli is clocked by Xilinx array */
|
|
ice->hw_rates = &juli_rates_info;
|
|
ice->is_spdif_master = juli_is_spdif_master;
|
|
ice->get_rate = juli_get_rate;
|
|
ice->set_rate = juli_set_rate;
|
|
ice->set_mclk = juli_set_mclk;
|
|
ice->set_spdif_clock = juli_set_spdif_clock;
|
|
|
|
ice->spdif.ops.open = juli_spdif_in_open;
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
ice->pm_resume = juli_resume;
|
|
ice->pm_suspend = juli_suspend;
|
|
ice->pm_suspend_enabled = 1;
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*
|
|
* Juli@ boards don't provide the EEPROM data except for the vendor IDs.
|
|
* hence the driver needs to sets up it properly.
|
|
*/
|
|
|
|
static const unsigned char juli_eeprom[] = {
|
|
[ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, 1xADC, 1xDACs,
|
|
SPDIF in */
|
|
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
|
|
[ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */
|
|
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
|
|
[ICE_EEP2_GPIO_DIR] = 0x9f, /* 5, 6:inputs; 7, 4-0 outputs*/
|
|
[ICE_EEP2_GPIO_DIR1] = 0xff,
|
|
[ICE_EEP2_GPIO_DIR2] = 0x7f,
|
|
[ICE_EEP2_GPIO_MASK] = 0x60, /* 5, 6: locked; 7, 4-0 writable */
|
|
[ICE_EEP2_GPIO_MASK1] = 0x00, /* 0-7 writable */
|
|
[ICE_EEP2_GPIO_MASK2] = 0x7f,
|
|
[ICE_EEP2_GPIO_STATE] = GPIO_FREQ_48KHZ | GPIO_MULTI_1X |
|
|
GPIO_INTERNAL_CLOCK, /* internal clock, multiple 1x, 48kHz*/
|
|
[ICE_EEP2_GPIO_STATE1] = 0x00, /* unmuted */
|
|
[ICE_EEP2_GPIO_STATE2] = 0x00,
|
|
};
|
|
|
|
/* entry point */
|
|
struct snd_ice1712_card_info snd_vt1724_juli_cards[] = {
|
|
{
|
|
.subvendor = VT1724_SUBDEVICE_JULI,
|
|
.name = "ESI Juli@",
|
|
.model = "juli",
|
|
.chip_init = juli_init,
|
|
.build_controls = juli_add_controls,
|
|
.eeprom_size = sizeof(juli_eeprom),
|
|
.eeprom_data = juli_eeprom,
|
|
},
|
|
{ } /* terminator */
|
|
};
|