mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-31 08:28:13 +00:00
7001052160
coarse grained, hardware based, forward edge Control-Flow-Integrity mechanism where any indirect CALL/JMP must target an ENDBR instruction or suffer #CP. Additionally, since Alderlake (12th gen)/Sapphire-Rapids, speculation is limited to 2 instructions (and typically fewer) on branch targets not starting with ENDBR. CET-IBT also limits speculation of the next sequential instruction after the indirect CALL/JMP [1]. CET-IBT is fundamentally incompatible with retpolines, but provides, as described above, speculation limits itself. [1] https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html -----BEGIN PGP SIGNATURE----- iQJJBAABCgAzFiEEv3OU3/byMaA0LqWJdkfhpEvA5LoFAmI/LI8VHHBldGVyekBp bmZyYWRlYWQub3JnAAoJEHZH4aRLwOS6ZnkP/2QCgQLTu6oRxv9O020CHwlaSEeD 1Hoy3loum5q5hAi1Ik3dR9p0H5u64c9qbrBVxaFoNKaLt5GKrtHaDSHNk2L/CFHX urpH65uvTLxbyZzcahkAahoJ71XU+m7PcrHLWMunw9sy10rExYVsUOlFyoyG6XCF BDCNZpdkC09ZM3vwlWGMZd5Pp+6HcZNPyoV9tpvWAS2l+WYFWAID7mflbpQ+tA8b y/hM6b3Ud0rT2ubuG1iUpopgNdwqQZ+HisMPGprh+wKZkYwS2l8pUTrz0MaBkFde go7fW16kFy2HQzGm6aIEBmfcg0palP/mFVaWP0zS62LwhJSWTn5G6xWBr3yxSsht 9gWCiI0oDZuTg698MedWmomdG2SK6yAuZuqmdKtLLoWfWgviPEi7TDFG/cKtZdAW ag8GM8T4iyYZzpCEcWO9GWbjo6TTGq30JBQefCBG47GjD0csv2ubXXx0Iey+jOwT x3E8wnv9dl8V9FSd/tMpTFmje8ges23yGrWtNpb5BRBuWTeuGiBPZED2BNyyIf+T dmewi2ufNMONgyNp27bDKopY81CPAQq9cVxqNm9Cg3eWPFnpOq2KGYEvisZ/rpEL EjMQeUBsy/C3AUFAleu1vwNnkwP/7JfKYpN00gnSyeQNZpqwxXBCKnHNgOMTXyJz beB/7u2KIUbKEkSN =jZfK -----END PGP SIGNATURE----- Merge tag 'x86_core_for_5.18_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 CET-IBT (Control-Flow-Integrity) support from Peter Zijlstra: "Add support for Intel CET-IBT, available since Tigerlake (11th gen), which is a coarse grained, hardware based, forward edge Control-Flow-Integrity mechanism where any indirect CALL/JMP must target an ENDBR instruction or suffer #CP. Additionally, since Alderlake (12th gen)/Sapphire-Rapids, speculation is limited to 2 instructions (and typically fewer) on branch targets not starting with ENDBR. CET-IBT also limits speculation of the next sequential instruction after the indirect CALL/JMP [1]. CET-IBT is fundamentally incompatible with retpolines, but provides, as described above, speculation limits itself" [1] https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html * tag 'x86_core_for_5.18_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (53 commits) kvm/emulate: Fix SETcc emulation for ENDBR x86/Kconfig: Only allow CONFIG_X86_KERNEL_IBT with ld.lld >= 14.0.0 x86/Kconfig: Only enable CONFIG_CC_HAS_IBT for clang >= 14.0.0 kbuild: Fixup the IBT kbuild changes x86/Kconfig: Do not allow CONFIG_X86_X32_ABI=y with llvm-objcopy x86: Remove toolchain check for X32 ABI capability x86/alternative: Use .ibt_endbr_seal to seal indirect calls objtool: Find unused ENDBR instructions objtool: Validate IBT assumptions objtool: Add IBT/ENDBR decoding objtool: Read the NOENDBR annotation x86: Annotate idtentry_df() x86,objtool: Move the ASM_REACHABLE annotation to objtool.h x86: Annotate call_on_stack() objtool: Rework ASM_REACHABLE x86: Mark __invalid_creds() __noreturn exit: Mark do_group_exit() __noreturn x86: Mark stop_this_cpu() __noreturn objtool: Ignore extra-symbol code objtool: Rename --duplicate to --lto ...
320 lines
7.9 KiB
C
320 lines
7.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/* Kernel module help for x86.
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Copyright (C) 2001 Rusty Russell.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/moduleloader.h>
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#include <linux/elf.h>
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#include <linux/vmalloc.h>
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#include <linux/fs.h>
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/kasan.h>
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#include <linux/bug.h>
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#include <linux/mm.h>
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#include <linux/gfp.h>
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#include <linux/jump_label.h>
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#include <linux/random.h>
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#include <linux/memory.h>
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#include <asm/text-patching.h>
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#include <asm/page.h>
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#include <asm/setup.h>
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#include <asm/unwind.h>
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#if 0
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#define DEBUGP(fmt, ...) \
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printk(KERN_DEBUG fmt, ##__VA_ARGS__)
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#else
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#define DEBUGP(fmt, ...) \
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do { \
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if (0) \
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printk(KERN_DEBUG fmt, ##__VA_ARGS__); \
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} while (0)
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#endif
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#ifdef CONFIG_RANDOMIZE_BASE
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static unsigned long module_load_offset;
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/* Mutex protects the module_load_offset. */
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static DEFINE_MUTEX(module_kaslr_mutex);
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static unsigned long int get_module_load_offset(void)
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{
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if (kaslr_enabled()) {
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mutex_lock(&module_kaslr_mutex);
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/*
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* Calculate the module_load_offset the first time this
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* code is called. Once calculated it stays the same until
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* reboot.
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*/
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if (module_load_offset == 0)
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module_load_offset =
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(get_random_int() % 1024 + 1) * PAGE_SIZE;
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mutex_unlock(&module_kaslr_mutex);
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}
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return module_load_offset;
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}
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#else
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static unsigned long int get_module_load_offset(void)
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{
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return 0;
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}
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#endif
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void *module_alloc(unsigned long size)
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{
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gfp_t gfp_mask = GFP_KERNEL;
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void *p;
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if (PAGE_ALIGN(size) > MODULES_LEN)
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return NULL;
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p = __vmalloc_node_range(size, MODULE_ALIGN,
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MODULES_VADDR + get_module_load_offset(),
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MODULES_END, gfp_mask,
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PAGE_KERNEL, VM_DEFER_KMEMLEAK, NUMA_NO_NODE,
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__builtin_return_address(0));
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if (p && (kasan_alloc_module_shadow(p, size, gfp_mask) < 0)) {
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vfree(p);
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return NULL;
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}
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return p;
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}
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#ifdef CONFIG_X86_32
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int apply_relocate(Elf32_Shdr *sechdrs,
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const char *strtab,
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unsigned int symindex,
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unsigned int relsec,
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struct module *me)
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{
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unsigned int i;
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Elf32_Rel *rel = (void *)sechdrs[relsec].sh_addr;
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Elf32_Sym *sym;
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uint32_t *location;
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DEBUGP("Applying relocate section %u to %u\n",
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relsec, sechdrs[relsec].sh_info);
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for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
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/* This is where to make the change */
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location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
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+ rel[i].r_offset;
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/* This is the symbol it is referring to. Note that all
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undefined symbols have been resolved. */
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sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
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+ ELF32_R_SYM(rel[i].r_info);
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switch (ELF32_R_TYPE(rel[i].r_info)) {
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case R_386_32:
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/* We add the value into the location given */
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*location += sym->st_value;
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break;
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case R_386_PC32:
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case R_386_PLT32:
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/* Add the value, subtract its position */
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*location += sym->st_value - (uint32_t)location;
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break;
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default:
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pr_err("%s: Unknown relocation: %u\n",
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me->name, ELF32_R_TYPE(rel[i].r_info));
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return -ENOEXEC;
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}
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}
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return 0;
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}
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#else /*X86_64*/
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static int __apply_relocate_add(Elf64_Shdr *sechdrs,
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const char *strtab,
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unsigned int symindex,
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unsigned int relsec,
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struct module *me,
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void *(*write)(void *dest, const void *src, size_t len))
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{
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unsigned int i;
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Elf64_Rela *rel = (void *)sechdrs[relsec].sh_addr;
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Elf64_Sym *sym;
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void *loc;
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u64 val;
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DEBUGP("Applying relocate section %u to %u\n",
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relsec, sechdrs[relsec].sh_info);
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for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
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/* This is where to make the change */
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loc = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
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+ rel[i].r_offset;
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/* This is the symbol it is referring to. Note that all
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undefined symbols have been resolved. */
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sym = (Elf64_Sym *)sechdrs[symindex].sh_addr
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+ ELF64_R_SYM(rel[i].r_info);
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DEBUGP("type %d st_value %Lx r_addend %Lx loc %Lx\n",
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(int)ELF64_R_TYPE(rel[i].r_info),
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sym->st_value, rel[i].r_addend, (u64)loc);
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val = sym->st_value + rel[i].r_addend;
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switch (ELF64_R_TYPE(rel[i].r_info)) {
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case R_X86_64_NONE:
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break;
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case R_X86_64_64:
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if (*(u64 *)loc != 0)
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goto invalid_relocation;
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write(loc, &val, 8);
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break;
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case R_X86_64_32:
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if (*(u32 *)loc != 0)
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goto invalid_relocation;
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write(loc, &val, 4);
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if (val != *(u32 *)loc)
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goto overflow;
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break;
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case R_X86_64_32S:
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if (*(s32 *)loc != 0)
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goto invalid_relocation;
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write(loc, &val, 4);
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if ((s64)val != *(s32 *)loc)
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goto overflow;
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break;
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case R_X86_64_PC32:
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case R_X86_64_PLT32:
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if (*(u32 *)loc != 0)
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goto invalid_relocation;
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val -= (u64)loc;
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write(loc, &val, 4);
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#if 0
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if ((s64)val != *(s32 *)loc)
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goto overflow;
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#endif
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break;
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case R_X86_64_PC64:
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if (*(u64 *)loc != 0)
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goto invalid_relocation;
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val -= (u64)loc;
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write(loc, &val, 8);
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break;
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default:
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pr_err("%s: Unknown rela relocation: %llu\n",
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me->name, ELF64_R_TYPE(rel[i].r_info));
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return -ENOEXEC;
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}
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}
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return 0;
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invalid_relocation:
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pr_err("x86/modules: Skipping invalid relocation target, existing value is nonzero for type %d, loc %p, val %Lx\n",
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(int)ELF64_R_TYPE(rel[i].r_info), loc, val);
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return -ENOEXEC;
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overflow:
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pr_err("overflow in relocation type %d val %Lx\n",
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(int)ELF64_R_TYPE(rel[i].r_info), val);
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pr_err("`%s' likely not compiled with -mcmodel=kernel\n",
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me->name);
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return -ENOEXEC;
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}
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int apply_relocate_add(Elf64_Shdr *sechdrs,
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const char *strtab,
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unsigned int symindex,
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unsigned int relsec,
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struct module *me)
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{
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int ret;
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bool early = me->state == MODULE_STATE_UNFORMED;
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void *(*write)(void *, const void *, size_t) = memcpy;
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if (!early) {
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write = text_poke;
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mutex_lock(&text_mutex);
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}
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ret = __apply_relocate_add(sechdrs, strtab, symindex, relsec, me,
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write);
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if (!early) {
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text_poke_sync();
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mutex_unlock(&text_mutex);
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}
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return ret;
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}
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#endif
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int module_finalize(const Elf_Ehdr *hdr,
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const Elf_Shdr *sechdrs,
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struct module *me)
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{
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const Elf_Shdr *s, *text = NULL, *alt = NULL, *locks = NULL,
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*para = NULL, *orc = NULL, *orc_ip = NULL,
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*retpolines = NULL, *ibt_endbr = NULL;
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char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
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for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) {
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if (!strcmp(".text", secstrings + s->sh_name))
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text = s;
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if (!strcmp(".altinstructions", secstrings + s->sh_name))
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alt = s;
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if (!strcmp(".smp_locks", secstrings + s->sh_name))
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locks = s;
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if (!strcmp(".parainstructions", secstrings + s->sh_name))
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para = s;
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if (!strcmp(".orc_unwind", secstrings + s->sh_name))
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orc = s;
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if (!strcmp(".orc_unwind_ip", secstrings + s->sh_name))
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orc_ip = s;
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if (!strcmp(".retpoline_sites", secstrings + s->sh_name))
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retpolines = s;
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if (!strcmp(".ibt_endbr_seal", secstrings + s->sh_name))
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ibt_endbr = s;
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}
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/*
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* See alternative_instructions() for the ordering rules between the
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* various patching types.
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*/
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if (para) {
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void *pseg = (void *)para->sh_addr;
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apply_paravirt(pseg, pseg + para->sh_size);
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}
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if (retpolines) {
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void *rseg = (void *)retpolines->sh_addr;
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apply_retpolines(rseg, rseg + retpolines->sh_size);
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}
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if (alt) {
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/* patch .altinstructions */
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void *aseg = (void *)alt->sh_addr;
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apply_alternatives(aseg, aseg + alt->sh_size);
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}
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if (ibt_endbr) {
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void *iseg = (void *)ibt_endbr->sh_addr;
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apply_ibt_endbr(iseg, iseg + ibt_endbr->sh_size);
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}
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if (locks && text) {
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void *lseg = (void *)locks->sh_addr;
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void *tseg = (void *)text->sh_addr;
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alternatives_smp_module_add(me, me->name,
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lseg, lseg + locks->sh_size,
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tseg, tseg + text->sh_size);
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}
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/* make jump label nops */
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jump_label_apply_nops(me);
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if (orc && orc_ip)
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unwind_module_init(me, (void *)orc_ip->sh_addr, orc_ip->sh_size,
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(void *)orc->sh_addr, orc->sh_size);
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return 0;
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}
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void module_arch_cleanup(struct module *mod)
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{
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alternatives_smp_module_del(mod);
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}
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