linux-stable/arch/arm64/mm
Ryan Roberts 4602e5757b arm64/mm: wire up PTE_CONT for user mappings
With the ptep API sufficiently refactored, we can now introduce a new
"contpte" API layer, which transparently manages the PTE_CONT bit for user
mappings.

In this initial implementation, only suitable batches of PTEs, set via
set_ptes(), are mapped with the PTE_CONT bit.  Any subsequent modification
of individual PTEs will cause an "unfold" operation to repaint the contpte
block as individual PTEs before performing the requested operation. 
While, a modification of a single PTE could cause the block of PTEs to
which it belongs to become eligible for "folding" into a contpte entry,
"folding" is not performed in this initial implementation due to the costs
of checking the requirements are met.  Due to this, contpte mappings will
degrade back to normal pte mappings over time if/when protections are
changed.  This will be solved in a future patch.

Since a contpte block only has a single access and dirty bit, the semantic
here changes slightly; when getting a pte (e.g.  ptep_get()) that is part
of a contpte mapping, the access and dirty information are pulled from the
block (so all ptes in the block return the same access/dirty info).  When
changing the access/dirty info on a pte (e.g.  ptep_set_access_flags())
that is part of a contpte mapping, this change will affect the whole
contpte block.  This is works fine in practice since we guarantee that
only a single folio is mapped by a contpte block, and the core-mm tracks
access/dirty information per folio.

In order for the public functions, which used to be pure inline, to
continue to be callable by modules, export all the contpte_* symbols that
are now called by those public inline functions.

The feature is enabled/disabled with the ARM64_CONTPTE Kconfig parameter
at build time.  It defaults to enabled as long as its dependency,
TRANSPARENT_HUGEPAGE is also enabled.  The core-mm depends upon
TRANSPARENT_HUGEPAGE to be able to allocate large folios, so if its not
enabled, then there is no chance of meeting the physical contiguity
requirement for contpte mappings.

Link: https://lkml.kernel.org/r/20240215103205.2607016-13-ryan.roberts@arm.com
Signed-off-by: Ryan Roberts <ryan.roberts@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: John Hubbard <jhubbard@nvidia.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Alistair Popple <apopple@nvidia.com>
Cc: Andrey Ryabinin <ryabinin.a.a@gmail.com>
Cc: Barry Song <21cnbao@gmail.com>
Cc: Borislav Petkov (AMD) <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: David Hildenbrand <david@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Morse <james.morse@arm.com>
Cc: Kefeng Wang <wangkefeng.wang@huawei.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Matthew Wilcox (Oracle) <willy@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will@kernel.org>
Cc: Yang Shi <shy828301@gmail.com>
Cc: Zi Yan <ziy@nvidia.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2024-02-22 15:27:18 -08:00
..
cache.S efi: arm64: enter with MMU and caches enabled 2023-01-24 11:51:08 +00:00
context.c arm64/mm: remove now-superfluous ISBs from TTBR writes 2023-06-15 17:47:54 +01:00
contpte.c arm64/mm: wire up PTE_CONT for user mappings 2024-02-22 15:27:18 -08:00
copypage.c arm64: Also reset KASAN tag if page is not PG_mte_tagged 2023-05-16 14:58:54 +01:00
dma-mapping.c iommu: Remove struct iommu_ops *iommu from arch_setup_dma_ops() 2023-12-12 10:18:45 +01:00
extable.c arm64: extable: cleanup redundant extable type EX_TYPE_FIXUP 2022-06-28 12:11:47 +01:00
fault.c arm64/mm: new ptep layer to manage contig bit 2024-02-22 15:27:18 -08:00
fixmap.c arm64/mm: new ptep layer to manage contig bit 2024-02-22 15:27:18 -08:00
flush.c arm64: implement the new page table range API 2023-08-24 16:20:20 -07:00
hugetlbpage.c arm64/mm: new ptep layer to manage contig bit 2024-02-22 15:27:18 -08:00
init.c As usual, lots of singleton and doubleton patches all over the tree and 2023-11-02 20:53:31 -10:00
ioremap.c arm64 : mm: add wrapper function ioremap_prot() 2023-08-18 10:12:36 -07:00
kasan_init.c arm64/mm: new ptep layer to manage contig bit 2024-02-22 15:27:18 -08:00
Makefile arm64/mm: wire up PTE_CONT for user mappings 2024-02-22 15:27:18 -08:00
mmap.c arm64: Avoid cpus_have_const_cap() for ARM64_HAS_EPAN 2023-10-16 14:17:04 +01:00
mmu.c arm64/mm: new ptep layer to manage contig bit 2024-02-22 15:27:18 -08:00
mteswap.c mm/swap: stop using page->private on tail pages for THP_SWAP 2023-08-24 16:20:28 -07:00
pageattr.c arm64/mm: new ptep layer to manage contig bit 2024-02-22 15:27:18 -08:00
pgd.c mm: consolidate pgtable_cache_init() and pgd_cache_init() 2019-09-24 15:54:09 -07:00
physaddr.c arm64: Do not pass tagged addresses to __is_lm_address() 2021-02-02 17:44:47 +00:00
proc.S arm64: Use a positive cpucap for FP/SIMD 2023-10-16 14:17:03 +01:00
ptdump.c mm: ptdump: have ptdump_check_wx() return bool 2024-02-22 10:24:47 -08:00
ptdump_debugfs.c arm64: Add __init section marker to some functions 2021-04-08 17:45:10 +01:00
trans_pgd-asm.S arm64: kexec: configure EL2 vectors for kexec 2021-10-01 13:31:00 +01:00
trans_pgd.c arm64/mm: new ptep layer to manage contig bit 2024-02-22 15:27:18 -08:00