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![Dave Martin](/assets/img/avatar_default.png)
Making CACHE_L2X0 depend on (huge list of MACH_ and ARCH_ configs) is bothersome to maintain and likely to lead to merge conflicts. This patch moves the knowledge of which platforms have a L2x0 or PL310 cache controller to the individual machines. To enable this, a new MIGHT_HAVE_CACHE_L2X0 config option is introduced to allow machines to indicate that they may have such a cache controller independently of each other. Boards/SoCs which cannot reliably operate without the L2 cache controller support will need to select CACHE_L2X0 directly from their own Kconfigs instead. This applies to some TrustZone-enabled boards where Linux runs in the Normal World, for example. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com> (for cns3xxx) Acked-by: Tony Lindgren <tony@atomide.com> (for omap) Acked-by: Shawn Guo <shawn.guo@linaro.org> (for imx) Acked-by: Kukjin Kim <kgene.kim@samsung.com> (for exynos) Acked-by: Sascha Hauer <s.hauer@pengutronix.de> (for imx) Acked-by: Olof Johansson <olof@lixom.net> (for tegra)
110 lines
2.5 KiB
Text
110 lines
2.5 KiB
Text
if ARCH_MXC
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source "arch/arm/plat-mxc/devices/Kconfig"
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menu "Freescale MXC Implementations"
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choice
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prompt "Freescale CPU family:"
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default ARCH_IMX_V6_V7
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config ARCH_IMX_V4_V5
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bool "i.MX1, i.MX21, i.MX25, i.MX27"
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select AUTO_ZRELADDR if !ZBOOT_ROM
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select ARM_PATCH_PHYS_VIRT
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help
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This enables support for systems based on the Freescale i.MX ARMv4
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and ARMv5 SoCs
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config ARCH_IMX_V6_V7
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bool "i.MX3, i.MX6"
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select AUTO_ZRELADDR if !ZBOOT_ROM
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select ARM_PATCH_PHYS_VIRT
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select MIGHT_HAVE_CACHE_L2X0
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help
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This enables support for systems based on the Freescale i.MX3 and i.MX6
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family.
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config ARCH_MX5
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bool "i.MX50, i.MX51, i.MX53"
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select AUTO_ZRELADDR if !ZBOOT_ROM
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select ARM_PATCH_PHYS_VIRT
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help
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This enables support for machines using Freescale's i.MX50 and i.MX53
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processors.
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endchoice
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source "arch/arm/mach-imx/Kconfig"
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source "arch/arm/mach-mx5/Kconfig"
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endmenu
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config MXC_IRQ_PRIOR
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bool "Use IRQ priority"
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help
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Select this if you want to use prioritized IRQ handling.
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This feature prevents higher priority ISR to be interrupted
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by lower priority IRQ even IRQF_DISABLED flag is not set.
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This may be useful in embedded applications, where are strong
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requirements for timing.
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Say N here, unless you have a specialized requirement.
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config MXC_TZIC
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bool
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config MXC_AVIC
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bool
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config MXC_PWM
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tristate "Enable PWM driver"
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select HAVE_PWM
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help
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Enable support for the i.MX PWM controller(s).
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config MXC_DEBUG_BOARD
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bool "Enable MXC debug board(for 3-stack)"
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help
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The debug board is an integral part of the MXC 3-stack(PDK)
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platforms, it can be attached or removed from the peripheral
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board. On debug board, several debug devices(ethernet, UART,
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buttons, LEDs and JTAG) are implemented. Between the MCU and
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these devices, a CPLD is added as a bridge which performs
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data/address de-multiplexing and decode, signal level shift,
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interrupt control and various board functions.
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config HAVE_EPIT
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bool
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config MXC_USE_EPIT
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bool "Use EPIT instead of GPT"
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depends on HAVE_EPIT
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help
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Use EPIT as the system timer on systems that have it. Normally you
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don't have a reason to do so as the EPIT has the same features and
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uses the same clocks as the GPT. Anyway, on some systems the GPT
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may be in use for other purposes.
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config MXC_ULPI
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bool
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config ARCH_HAS_RNGA
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bool
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config IMX_HAVE_IOMUX_V1
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bool
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config ARCH_MXC_IOMUX_V3
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bool
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config ARCH_MXC_AUDMUX_V1
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bool
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config ARCH_MXC_AUDMUX_V2
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bool
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config IRAM_ALLOC
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bool
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select GENERIC_ALLOCATOR
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endif
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