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A significant part of the changes for these two platforms went into power management, so they are split out into a separate branch. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIVAwUATwtaEmCrR//JCVInAQIUqBAAkqKDGCyKmC2nDfz5ejYNUvugkDxgYv5I fl9UUfBc2cLDVyOynzjH9SLTphVAI8jZa0KZAlvB8/+4Wcg7XNhUFPDH868zlPzP mSsPPTnb3WJTqb1PLKi7oTbA7CfsX/srRaAtrEX7Nng7uGTZZq+5RL6mOR/bqHyR F/VuV5U9HkDjgM7T7NtcNMqP9ysHDSrcNDse62yKh8FLot59rqXEEXZWTIYZphbI v+BURp4EHs5Wm5AVJbpGmWhk4+NgRCLE0ZKZlfxnJctFz5+bW11TX/85ua+UXtmt Fnij44jSmAzbQ1o0VLbN760iBsbPN/JElYWXwIqR6v5M+Hd2UDRm3a6Bc1xqUNx0 0C8DEoo78XebhldAsN1TL/V94j1ojuNyWC7qkn9VBZLTiVYPyV/oeIdxtR19u1lB QctpXeUPCfdDyD+wAWbqid0MExayP3TAwJ5vK8Tw+ssIv3A19RkUI6kdGaW4RqyL 5n5o7Ze4CGOzrthWuyfw5flKbjRUrmtLO6TTgPZKCwxeiQh3G1GJcCL6lKbGbH3M Z8jNWzEMMExZU+55P8hRrtNgnx6rqn2bWi/3cCSmuKB6KHBUWXfKJw3rmTcWOsLB aNSXqYoWtTK9hJ0zo1xIAGmnJlfrO9I66abCuHHjDKVh1W5j7zmZwrj4ErUuS/dO UHOmrQN/GOY= =P4kO -----END PGP SIGNATURE----- Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc power management changes for omap and imx A significant part of the changes for these two platforms went into power management, so they are split out into a separate branch. * tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (65 commits) ARM: imx6: remove __CPUINIT annotation from v7_invalidate_l1 ARM: imx6: fix v7_invalidate_l1 by adding I-Cache invalidation ARM: imx6q: resume PL310 only when CACHE_L2X0 defined ARM: imx6q: build pm code only when CONFIG_PM selected ARM: mx5: use generic irq chip pm interface for pm functions on ARM: omap: pass minimal SoC/board data for UART from dt arm/dts: Add minimal device tree support for omap2420 and omap2430 omap-serial: Add minimal device tree support omap-serial: Use default clock speed (48Mhz) if not specified omap-serial: Get rid of all pdev->id usage ARM: OMAP2+: hwmod: Add a new flag to handle hwmods left enabled at init ARM: OMAP4: PRM: use PRCM interrupt handler ARM: OMAP3: pm: use prcm chain handler ARM: OMAP: hwmod: add support for selecting mpu_irq for each wakeup pad ARM: OMAP2+: mux: add support for PAD wakeup interrupts ARM: OMAP: PRCM: add suspend prepare / finish support ARM: OMAP: PRCM: add support for chain interrupt handler ARM: OMAP3/4: PRM: add functions to read pending IRQs, PRM barrier ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup ARM: OMAP2+: mux: add wakeup-capable hwmod mux entries to dynamic list ...
142 lines
4.8 KiB
C
142 lines
4.8 KiB
C
/*
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* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_MXC_COMMON_H__
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#define __ASM_ARCH_MXC_COMMON_H__
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struct platform_device;
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struct clk;
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enum mxc_cpu_pwr_mode;
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extern void mx1_map_io(void);
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extern void mx21_map_io(void);
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extern void mx25_map_io(void);
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extern void mx27_map_io(void);
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extern void mx31_map_io(void);
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extern void mx35_map_io(void);
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extern void mx50_map_io(void);
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extern void mx51_map_io(void);
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extern void mx53_map_io(void);
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extern void imx1_init_early(void);
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extern void imx21_init_early(void);
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extern void imx25_init_early(void);
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extern void imx27_init_early(void);
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extern void imx31_init_early(void);
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extern void imx35_init_early(void);
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extern void imx50_init_early(void);
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extern void imx51_init_early(void);
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extern void imx53_init_early(void);
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extern void mxc_init_irq(void __iomem *);
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extern void tzic_init_irq(void __iomem *);
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extern void mx1_init_irq(void);
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extern void mx21_init_irq(void);
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extern void mx25_init_irq(void);
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extern void mx27_init_irq(void);
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extern void mx31_init_irq(void);
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extern void mx35_init_irq(void);
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extern void mx50_init_irq(void);
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extern void mx51_init_irq(void);
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extern void mx53_init_irq(void);
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extern void imx1_soc_init(void);
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extern void imx21_soc_init(void);
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extern void imx25_soc_init(void);
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extern void imx27_soc_init(void);
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extern void imx31_soc_init(void);
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extern void imx35_soc_init(void);
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extern void imx50_soc_init(void);
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extern void imx51_soc_init(void);
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extern void imx53_soc_init(void);
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extern void epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq);
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extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int);
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extern int mx1_clocks_init(unsigned long fref);
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extern int mx21_clocks_init(unsigned long lref, unsigned long fref);
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extern int mx25_clocks_init(void);
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extern int mx27_clocks_init(unsigned long fref);
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extern int mx31_clocks_init(unsigned long fref);
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extern int mx35_clocks_init(void);
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extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
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unsigned long ckih1, unsigned long ckih2);
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extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
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unsigned long ckih1, unsigned long ckih2);
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extern int mx51_clocks_init_dt(void);
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extern int mx53_clocks_init_dt(void);
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extern int mx6q_clocks_init(void);
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extern struct platform_device *mxc_register_gpio(char *name, int id,
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resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
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extern void mxc_set_cpu_type(unsigned int type);
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extern void mxc_restart(char, const char *);
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extern void mxc_arch_reset_init(void __iomem *);
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extern int mx53_revision(void);
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extern int mx53_display_revision(void);
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enum mxc_cpu_pwr_mode {
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WAIT_CLOCKED, /* wfi only */
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WAIT_UNCLOCKED, /* WAIT */
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WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
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STOP_POWER_ON, /* just STOP */
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STOP_POWER_OFF, /* STOP + SRPG */
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};
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extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
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extern void imx_print_silicon_rev(const char *cpu, int srev);
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void avic_handle_irq(struct pt_regs *);
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void tzic_handle_irq(struct pt_regs *);
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#define imx1_handle_irq avic_handle_irq
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#define imx21_handle_irq avic_handle_irq
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#define imx25_handle_irq avic_handle_irq
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#define imx27_handle_irq avic_handle_irq
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#define imx31_handle_irq avic_handle_irq
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#define imx35_handle_irq avic_handle_irq
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#define imx50_handle_irq tzic_handle_irq
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#define imx51_handle_irq tzic_handle_irq
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#define imx53_handle_irq tzic_handle_irq
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#define imx6q_handle_irq gic_handle_irq
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extern void imx_enable_cpu(int cpu, bool enable);
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extern void imx_set_cpu_jump(int cpu, void *jump_addr);
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#ifdef CONFIG_DEBUG_LL
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extern void imx_lluart_map_io(void);
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#else
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static inline void imx_lluart_map_io(void) {}
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#endif
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extern void v7_cpu_resume(void);
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extern u32 *pl310_get_save_ptr(void);
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#ifdef CONFIG_SMP
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extern void v7_secondary_startup(void);
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extern void imx_scu_map_io(void);
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extern void imx_smp_prepare(void);
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#else
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static inline void imx_scu_map_io(void) {}
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static inline void imx_smp_prepare(void) {}
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#endif
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extern void imx_enable_cpu(int cpu, bool enable);
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extern void imx_set_cpu_jump(int cpu, void *jump_addr);
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extern void imx_src_init(void);
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extern void imx_src_prepare_restart(void);
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extern void imx_gpc_init(void);
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extern void imx_gpc_pre_suspend(void);
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extern void imx_gpc_post_resume(void);
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extern void imx51_babbage_common_init(void);
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extern void imx53_ard_common_init(void);
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extern void imx53_evk_common_init(void);
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extern void imx53_qsb_common_init(void);
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extern void imx53_smd_common_init(void);
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extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
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extern void imx6q_clock_map_io(void);
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#ifdef CONFIG_PM
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extern void imx6q_pm_init(void);
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#else
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static inline void imx6q_pm_init(void) {}
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#endif
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#endif
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