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ca2dc35e55
The DWC2 IP on the Rockchip SoCs doesn't support clock gating. When a clock gating is enabled, system hangs. Signed-off-by: William Wu <william.wu@rock-chips.com> Acked-by: Minas Harutyunyan <hminas@synopsys.com> Link: https://lore.kernel.org/r/1703575199-23638-1-git-send-email-william.wu@rock-chips.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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.. | ||
core.c | ||
core.h | ||
core_intr.c | ||
debug.h | ||
debugfs.c | ||
drd.c | ||
gadget.c | ||
hcd.c | ||
hcd.h | ||
hcd_ddma.c | ||
hcd_intr.c | ||
hcd_queue.c | ||
hw.h | ||
Kconfig | ||
Makefile | ||
params.c | ||
pci.c | ||
platform.c |