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997153b9a7
Some CPUs don't support icache.va instruction to maintain the whole smp cores' icache. Using icache.all + IPI casue a lot on performace and using defer mechanism could reduce the number of calling icache _flush_all functions. Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
29 lines
575 B
C
29 lines
575 B
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#include <linux/syscalls.h>
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#include <asm/page.h>
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#include <asm/cacheflush.h>
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#include <asm/cachectl.h>
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SYSCALL_DEFINE3(cacheflush,
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void __user *, addr,
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unsigned long, bytes,
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int, cache)
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{
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switch (cache) {
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case ICACHE:
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case BCACHE:
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flush_icache_mm_range(current->mm,
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(unsigned long)addr,
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(unsigned long)addr + bytes);
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case DCACHE:
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dcache_wb_range((unsigned long)addr,
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(unsigned long)addr + bytes);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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