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![Daniele Ceraolo Spurio](/assets/img/avatar_default.png)
Wait on the fence to be signalled to avoid the submissions finding HuC not yet loaded. v2: use dedicaded wait_queue_entry for waiting in HuC load, as submitq can't be re-used for it. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Tony Ye <tony.ye@intel.com> Acked-by: Tony Ye <tony.ye@intel.com> Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220928004145.745803-13-daniele.ceraolospurio@intel.com
732 lines
23 KiB
C
732 lines
23 KiB
C
/*
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* Copyright © 2008-2018 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#ifndef I915_REQUEST_H
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#define I915_REQUEST_H
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#include <linux/dma-fence.h>
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#include <linux/hrtimer.h>
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#include <linux/irq_work.h>
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#include <linux/llist.h>
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#include <linux/lockdep.h>
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#include "gem/i915_gem_context_types.h"
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#include "gt/intel_context_types.h"
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#include "gt/intel_engine_types.h"
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#include "gt/intel_timeline_types.h"
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#include "i915_gem.h"
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#include "i915_scheduler.h"
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#include "i915_selftest.h"
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#include "i915_sw_fence.h"
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#include "i915_vma_resource.h"
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#include <uapi/drm/i915_drm.h>
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struct drm_file;
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struct drm_i915_gem_object;
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struct drm_printer;
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struct i915_deps;
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struct i915_request;
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#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
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struct i915_capture_list {
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struct i915_vma_resource *vma_res;
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struct i915_capture_list *next;
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};
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void i915_request_free_capture_list(struct i915_capture_list *capture);
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#else
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#define i915_request_free_capture_list(_a) do {} while (0)
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#endif
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#define RQ_TRACE(rq, fmt, ...) do { \
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const struct i915_request *rq__ = (rq); \
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ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d " fmt, \
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rq__->fence.context, rq__->fence.seqno, \
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hwsp_seqno(rq__), ##__VA_ARGS__); \
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} while (0)
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enum {
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/*
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* I915_FENCE_FLAG_ACTIVE - this request is currently submitted to HW.
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*
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* Set by __i915_request_submit() on handing over to HW, and cleared
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* by __i915_request_unsubmit() if we preempt this request.
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*
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* Finally cleared for consistency on retiring the request, when
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* we know the HW is no longer running this request.
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*
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* See i915_request_is_active()
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*/
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I915_FENCE_FLAG_ACTIVE = DMA_FENCE_FLAG_USER_BITS,
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/*
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* I915_FENCE_FLAG_PQUEUE - this request is ready for execution
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*
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* Using the scheduler, when a request is ready for execution it is put
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* into the priority queue, and removed from that queue when transferred
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* to the HW runlists. We want to track its membership within the
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* priority queue so that we can easily check before rescheduling.
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*
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* See i915_request_in_priority_queue()
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*/
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I915_FENCE_FLAG_PQUEUE,
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/*
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* I915_FENCE_FLAG_HOLD - this request is currently on hold
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*
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* This request has been suspended, pending an ongoing investigation.
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*/
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I915_FENCE_FLAG_HOLD,
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/*
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* I915_FENCE_FLAG_INITIAL_BREADCRUMB - this request has the initial
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* breadcrumb that marks the end of semaphore waits and start of the
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* user payload.
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*/
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I915_FENCE_FLAG_INITIAL_BREADCRUMB,
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/*
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* I915_FENCE_FLAG_SIGNAL - this request is currently on signal_list
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*
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* Internal bookkeeping used by the breadcrumb code to track when
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* a request is on the various signal_list.
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*/
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I915_FENCE_FLAG_SIGNAL,
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/*
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* I915_FENCE_FLAG_NOPREEMPT - this request should not be preempted
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*
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* The execution of some requests should not be interrupted. This is
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* a sensitive operation as it makes the request super important,
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* blocking other higher priority work. Abuse of this flag will
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* lead to quality of service issues.
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*/
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I915_FENCE_FLAG_NOPREEMPT,
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/*
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* I915_FENCE_FLAG_SENTINEL - this request should be last in the queue
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*
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* A high priority sentinel request may be submitted to clear the
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* submission queue. As it will be the only request in-flight, upon
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* execution all other active requests will have been preempted and
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* unsubmitted. This preemptive pulse is used to re-evaluate the
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* in-flight requests, particularly in cases where an active context
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* is banned and those active requests need to be cancelled.
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*/
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I915_FENCE_FLAG_SENTINEL,
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/*
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* I915_FENCE_FLAG_BOOST - upclock the gpu for this request
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*
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* Some requests are more important than others! In particular, a
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* request that the user is waiting on is typically required for
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* interactive latency, for which we want to minimise by upclocking
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* the GPU. Here we track such boost requests on a per-request basis.
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*/
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I915_FENCE_FLAG_BOOST,
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/*
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* I915_FENCE_FLAG_SUBMIT_PARALLEL - request with a context in a
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* parent-child relationship (parallel submission, multi-lrc) should
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* trigger a submission to the GuC rather than just moving the context
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* tail.
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*/
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I915_FENCE_FLAG_SUBMIT_PARALLEL,
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/*
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* I915_FENCE_FLAG_SKIP_PARALLEL - request with a context in a
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* parent-child relationship (parallel submission, multi-lrc) that
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* hit an error while generating requests in the execbuf IOCTL.
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* Indicates this request should be skipped as another request in
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* submission / relationship encoutered an error.
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*/
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I915_FENCE_FLAG_SKIP_PARALLEL,
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/*
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* I915_FENCE_FLAG_COMPOSITE - Indicates fence is part of a composite
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* fence (dma_fence_array) and i915 generated for parallel submission.
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*/
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I915_FENCE_FLAG_COMPOSITE,
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};
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/**
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* Request queue structure.
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*
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* The request queue allows us to note sequence numbers that have been emitted
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* and may be associated with active buffers to be retired.
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*
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* By keeping this list, we can avoid having to do questionable sequence
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* number comparisons on buffer last_read|write_seqno. It also allows an
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* emission time to be associated with the request for tracking how far ahead
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* of the GPU the submission is.
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*
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* When modifying this structure be very aware that we perform a lockless
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* RCU lookup of it that may race against reallocation of the struct
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* from the slab freelist. We intentionally do not zero the structure on
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* allocation so that the lookup can use the dangling pointers (and is
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* cogniscent that those pointers may be wrong). Instead, everything that
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* needs to be initialised must be done so explicitly.
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*
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* The requests are reference counted.
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*/
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struct i915_request {
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struct dma_fence fence;
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spinlock_t lock;
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struct drm_i915_private *i915;
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/**
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* Context and ring buffer related to this request
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* Contexts are refcounted, so when this request is associated with a
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* context, we must increment the context's refcount, to guarantee that
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* it persists while any request is linked to it. Requests themselves
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* are also refcounted, so the request will only be freed when the last
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* reference to it is dismissed, and the code in
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* i915_request_free() will then decrement the refcount on the
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* context.
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*/
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struct intel_engine_cs *engine;
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struct intel_context *context;
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struct intel_ring *ring;
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struct intel_timeline __rcu *timeline;
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struct list_head signal_link;
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struct llist_node signal_node;
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/*
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* The rcu epoch of when this request was allocated. Used to judiciously
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* apply backpressure on future allocations to ensure that under
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* mempressure there is sufficient RCU ticks for us to reclaim our
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* RCU protected slabs.
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*/
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unsigned long rcustate;
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/*
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* We pin the timeline->mutex while constructing the request to
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* ensure that no caller accidentally drops it during construction.
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* The timeline->mutex must be held to ensure that only this caller
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* can use the ring and manipulate the associated timeline during
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* construction.
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*/
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struct pin_cookie cookie;
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/*
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* Fences for the various phases in the request's lifetime.
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*
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* The submit fence is used to await upon all of the request's
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* dependencies. When it is signaled, the request is ready to run.
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* It is used by the driver to then queue the request for execution.
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*/
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struct i915_sw_fence submit;
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union {
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wait_queue_entry_t submitq;
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struct i915_sw_dma_fence_cb dmaq;
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struct i915_request_duration_cb {
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struct dma_fence_cb cb;
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ktime_t emitted;
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} duration;
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};
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struct llist_head execute_cb;
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struct i915_sw_fence semaphore;
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/**
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* @submit_work: complete submit fence from an IRQ if needed for
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* locking hierarchy reasons.
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*/
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struct irq_work submit_work;
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/*
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* A list of everyone we wait upon, and everyone who waits upon us.
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* Even though we will not be submitted to the hardware before the
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* submit fence is signaled (it waits for all external events as well
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* as our own requests), the scheduler still needs to know the
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* dependency tree for the lifetime of the request (from execbuf
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* to retirement), i.e. bidirectional dependency information for the
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* request not tied to individual fences.
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*/
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struct i915_sched_node sched;
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struct i915_dependency dep;
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intel_engine_mask_t execution_mask;
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/*
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* A convenience pointer to the current breadcrumb value stored in
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* the HW status page (or our timeline's local equivalent). The full
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* path would be rq->hw_context->ring->timeline->hwsp_seqno.
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*/
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const u32 *hwsp_seqno;
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/** Position in the ring of the start of the request */
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u32 head;
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/** Position in the ring of the start of the user packets */
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u32 infix;
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/**
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* Position in the ring of the start of the postfix.
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* This is required to calculate the maximum available ring space
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* without overwriting the postfix.
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*/
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u32 postfix;
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/** Position in the ring of the end of the whole request */
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u32 tail;
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/** Position in the ring of the end of any workarounds after the tail */
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u32 wa_tail;
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/** Preallocate space in the ring for the emitting the request */
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u32 reserved_space;
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/** Batch buffer pointer for selftest internal use. */
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I915_SELFTEST_DECLARE(struct i915_vma *batch);
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struct i915_vma_resource *batch_res;
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#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
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/**
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* Additional buffers requested by userspace to be captured upon
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* a GPU hang. The vma/obj on this list are protected by their
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* active reference - all objects on this list must also be
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* on the active_list (of their final request).
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*/
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struct i915_capture_list *capture_list;
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#endif
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/** Time at which this request was emitted, in jiffies. */
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unsigned long emitted_jiffies;
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/** timeline->request entry for this request */
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struct list_head link;
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/** Watchdog support fields. */
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struct i915_request_watchdog {
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struct llist_node link;
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struct hrtimer timer;
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} watchdog;
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/**
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* @guc_fence_link: Requests may need to be stalled when using GuC
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* submission waiting for certain GuC operations to complete. If that is
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* the case, stalled requests are added to a per context list of stalled
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* requests. The below list_head is the link in that list. Protected by
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* ce->guc_state.lock.
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*/
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struct list_head guc_fence_link;
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/**
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* @guc_prio: Priority level while the request is in flight. Differs
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* from i915 scheduler priority. See comment above
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* I915_SCHEDULER_CAP_STATIC_PRIORITY_MAP for details. Protected by
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* ce->guc_active.lock. Two special values (GUC_PRIO_INIT and
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* GUC_PRIO_FINI) outside the GuC priority range are used to indicate
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* if the priority has not been initialized yet or if no more updates
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* are possible because the request has completed.
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*/
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#define GUC_PRIO_INIT 0xff
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#define GUC_PRIO_FINI 0xfe
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u8 guc_prio;
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/**
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* @hucq: wait queue entry used to wait on the HuC load to complete
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*/
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wait_queue_entry_t hucq;
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I915_SELFTEST_DECLARE(struct {
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struct list_head link;
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unsigned long delay;
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} mock;)
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};
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#define I915_FENCE_GFP (GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)
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extern const struct dma_fence_ops i915_fence_ops;
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static inline bool dma_fence_is_i915(const struct dma_fence *fence)
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{
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return fence->ops == &i915_fence_ops;
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}
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struct kmem_cache *i915_request_slab_cache(void);
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struct i915_request * __must_check
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__i915_request_create(struct intel_context *ce, gfp_t gfp);
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struct i915_request * __must_check
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i915_request_create(struct intel_context *ce);
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void __i915_request_skip(struct i915_request *rq);
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bool i915_request_set_error_once(struct i915_request *rq, int error);
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struct i915_request *i915_request_mark_eio(struct i915_request *rq);
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struct i915_request *__i915_request_commit(struct i915_request *request);
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void __i915_request_queue(struct i915_request *rq,
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const struct i915_sched_attr *attr);
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void __i915_request_queue_bh(struct i915_request *rq);
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bool i915_request_retire(struct i915_request *rq);
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void i915_request_retire_upto(struct i915_request *rq);
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static inline struct i915_request *
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to_request(struct dma_fence *fence)
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{
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/* We assume that NULL fence/request are interoperable */
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BUILD_BUG_ON(offsetof(struct i915_request, fence) != 0);
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GEM_BUG_ON(fence && !dma_fence_is_i915(fence));
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return container_of(fence, struct i915_request, fence);
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}
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static inline struct i915_request *
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i915_request_get(struct i915_request *rq)
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{
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return to_request(dma_fence_get(&rq->fence));
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}
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static inline struct i915_request *
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i915_request_get_rcu(struct i915_request *rq)
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{
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return to_request(dma_fence_get_rcu(&rq->fence));
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}
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static inline void
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i915_request_put(struct i915_request *rq)
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{
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dma_fence_put(&rq->fence);
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}
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int i915_request_await_object(struct i915_request *to,
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struct drm_i915_gem_object *obj,
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bool write);
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int i915_request_await_dma_fence(struct i915_request *rq,
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struct dma_fence *fence);
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int i915_request_await_deps(struct i915_request *rq, const struct i915_deps *deps);
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int i915_request_await_execution(struct i915_request *rq,
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struct dma_fence *fence);
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void i915_request_add(struct i915_request *rq);
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bool __i915_request_submit(struct i915_request *request);
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void i915_request_submit(struct i915_request *request);
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void __i915_request_unsubmit(struct i915_request *request);
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void i915_request_unsubmit(struct i915_request *request);
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void i915_request_cancel(struct i915_request *rq, int error);
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long i915_request_wait_timeout(struct i915_request *rq,
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unsigned int flags,
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long timeout)
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__attribute__((nonnull(1)));
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long i915_request_wait(struct i915_request *rq,
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unsigned int flags,
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long timeout)
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__attribute__((nonnull(1)));
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#define I915_WAIT_INTERRUPTIBLE BIT(0)
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#define I915_WAIT_PRIORITY BIT(1) /* small priority bump for the request */
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#define I915_WAIT_ALL BIT(2) /* used by i915_gem_object_wait() */
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void i915_request_show(struct drm_printer *m,
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const struct i915_request *rq,
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const char *prefix,
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int indent);
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static inline bool i915_request_signaled(const struct i915_request *rq)
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{
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/* The request may live longer than its HWSP, so check flags first! */
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return test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &rq->fence.flags);
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}
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static inline bool i915_request_is_active(const struct i915_request *rq)
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{
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return test_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags);
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}
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static inline bool i915_request_in_priority_queue(const struct i915_request *rq)
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{
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return test_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);
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}
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static inline bool
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i915_request_has_initial_breadcrumb(const struct i915_request *rq)
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{
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return test_bit(I915_FENCE_FLAG_INITIAL_BREADCRUMB, &rq->fence.flags);
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}
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/**
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* Returns true if seq1 is later than seq2.
|
|
*/
|
|
static inline bool i915_seqno_passed(u32 seq1, u32 seq2)
|
|
{
|
|
return (s32)(seq1 - seq2) >= 0;
|
|
}
|
|
|
|
static inline u32 __hwsp_seqno(const struct i915_request *rq)
|
|
{
|
|
const u32 *hwsp = READ_ONCE(rq->hwsp_seqno);
|
|
|
|
return READ_ONCE(*hwsp);
|
|
}
|
|
|
|
/**
|
|
* hwsp_seqno - the current breadcrumb value in the HW status page
|
|
* @rq: the request, to chase the relevant HW status page
|
|
*
|
|
* The emphasis in naming here is that hwsp_seqno() is not a property of the
|
|
* request, but an indication of the current HW state (associated with this
|
|
* request). Its value will change as the GPU executes more requests.
|
|
*
|
|
* Returns the current breadcrumb value in the associated HW status page (or
|
|
* the local timeline's equivalent) for this request. The request itself
|
|
* has the associated breadcrumb value of rq->fence.seqno, when the HW
|
|
* status page has that breadcrumb or later, this request is complete.
|
|
*/
|
|
static inline u32 hwsp_seqno(const struct i915_request *rq)
|
|
{
|
|
u32 seqno;
|
|
|
|
rcu_read_lock(); /* the HWSP may be freed at runtime */
|
|
seqno = __hwsp_seqno(rq);
|
|
rcu_read_unlock();
|
|
|
|
return seqno;
|
|
}
|
|
|
|
static inline bool __i915_request_has_started(const struct i915_request *rq)
|
|
{
|
|
return i915_seqno_passed(__hwsp_seqno(rq), rq->fence.seqno - 1);
|
|
}
|
|
|
|
/**
|
|
* i915_request_started - check if the request has begun being executed
|
|
* @rq: the request
|
|
*
|
|
* If the timeline is not using initial breadcrumbs, a request is
|
|
* considered started if the previous request on its timeline (i.e.
|
|
* context) has been signaled.
|
|
*
|
|
* If the timeline is using semaphores, it will also be emitting an
|
|
* "initial breadcrumb" after the semaphores are complete and just before
|
|
* it began executing the user payload. A request can therefore be active
|
|
* on the HW and not yet started as it is still busywaiting on its
|
|
* dependencies (via HW semaphores).
|
|
*
|
|
* If the request has started, its dependencies will have been signaled
|
|
* (either by fences or by semaphores) and it will have begun processing
|
|
* the user payload.
|
|
*
|
|
* However, even if a request has started, it may have been preempted and
|
|
* so no longer active, or it may have already completed.
|
|
*
|
|
* See also i915_request_is_active().
|
|
*
|
|
* Returns true if the request has begun executing the user payload, or
|
|
* has completed:
|
|
*/
|
|
static inline bool i915_request_started(const struct i915_request *rq)
|
|
{
|
|
bool result;
|
|
|
|
if (i915_request_signaled(rq))
|
|
return true;
|
|
|
|
result = true;
|
|
rcu_read_lock(); /* the HWSP may be freed at runtime */
|
|
if (likely(!i915_request_signaled(rq)))
|
|
/* Remember: started but may have since been preempted! */
|
|
result = __i915_request_has_started(rq);
|
|
rcu_read_unlock();
|
|
|
|
return result;
|
|
}
|
|
|
|
/**
|
|
* i915_request_is_running - check if the request may actually be executing
|
|
* @rq: the request
|
|
*
|
|
* Returns true if the request is currently submitted to hardware, has passed
|
|
* its start point (i.e. the context is setup and not busywaiting). Note that
|
|
* it may no longer be running by the time the function returns!
|
|
*/
|
|
static inline bool i915_request_is_running(const struct i915_request *rq)
|
|
{
|
|
bool result;
|
|
|
|
if (!i915_request_is_active(rq))
|
|
return false;
|
|
|
|
rcu_read_lock();
|
|
result = __i915_request_has_started(rq) && i915_request_is_active(rq);
|
|
rcu_read_unlock();
|
|
|
|
return result;
|
|
}
|
|
|
|
/**
|
|
* i915_request_is_ready - check if the request is ready for execution
|
|
* @rq: the request
|
|
*
|
|
* Upon construction, the request is instructed to wait upon various
|
|
* signals before it is ready to be executed by the HW. That is, we do
|
|
* not want to start execution and read data before it is written. In practice,
|
|
* this is controlled with a mixture of interrupts and semaphores. Once
|
|
* the submit fence is completed, the backend scheduler will place the
|
|
* request into its queue and from there submit it for execution. So we
|
|
* can detect when a request is eligible for execution (and is under control
|
|
* of the scheduler) by querying where it is in any of the scheduler's lists.
|
|
*
|
|
* Returns true if the request is ready for execution (it may be inflight),
|
|
* false otherwise.
|
|
*/
|
|
static inline bool i915_request_is_ready(const struct i915_request *rq)
|
|
{
|
|
return !list_empty(&rq->sched.link);
|
|
}
|
|
|
|
static inline bool __i915_request_is_complete(const struct i915_request *rq)
|
|
{
|
|
return i915_seqno_passed(__hwsp_seqno(rq), rq->fence.seqno);
|
|
}
|
|
|
|
static inline bool i915_request_completed(const struct i915_request *rq)
|
|
{
|
|
bool result;
|
|
|
|
if (i915_request_signaled(rq))
|
|
return true;
|
|
|
|
result = true;
|
|
rcu_read_lock(); /* the HWSP may be freed at runtime */
|
|
if (likely(!i915_request_signaled(rq)))
|
|
result = __i915_request_is_complete(rq);
|
|
rcu_read_unlock();
|
|
|
|
return result;
|
|
}
|
|
|
|
static inline void i915_request_mark_complete(struct i915_request *rq)
|
|
{
|
|
WRITE_ONCE(rq->hwsp_seqno, /* decouple from HWSP */
|
|
(u32 *)&rq->fence.seqno);
|
|
}
|
|
|
|
static inline bool i915_request_has_waitboost(const struct i915_request *rq)
|
|
{
|
|
return test_bit(I915_FENCE_FLAG_BOOST, &rq->fence.flags);
|
|
}
|
|
|
|
static inline bool i915_request_has_nopreempt(const struct i915_request *rq)
|
|
{
|
|
/* Preemption should only be disabled very rarely */
|
|
return unlikely(test_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags));
|
|
}
|
|
|
|
static inline bool i915_request_has_sentinel(const struct i915_request *rq)
|
|
{
|
|
return unlikely(test_bit(I915_FENCE_FLAG_SENTINEL, &rq->fence.flags));
|
|
}
|
|
|
|
static inline bool i915_request_on_hold(const struct i915_request *rq)
|
|
{
|
|
return unlikely(test_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags));
|
|
}
|
|
|
|
static inline void i915_request_set_hold(struct i915_request *rq)
|
|
{
|
|
set_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags);
|
|
}
|
|
|
|
static inline void i915_request_clear_hold(struct i915_request *rq)
|
|
{
|
|
clear_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags);
|
|
}
|
|
|
|
static inline struct intel_timeline *
|
|
i915_request_timeline(const struct i915_request *rq)
|
|
{
|
|
/* Valid only while the request is being constructed (or retired). */
|
|
return rcu_dereference_protected(rq->timeline,
|
|
lockdep_is_held(&rcu_access_pointer(rq->timeline)->mutex) ||
|
|
test_bit(CONTEXT_IS_PARKING, &rq->context->flags));
|
|
}
|
|
|
|
static inline struct i915_gem_context *
|
|
i915_request_gem_context(const struct i915_request *rq)
|
|
{
|
|
/* Valid only while the request is being constructed (or retired). */
|
|
return rcu_dereference_protected(rq->context->gem_context, true);
|
|
}
|
|
|
|
static inline struct intel_timeline *
|
|
i915_request_active_timeline(const struct i915_request *rq)
|
|
{
|
|
/*
|
|
* When in use during submission, we are protected by a guarantee that
|
|
* the context/timeline is pinned and must remain pinned until after
|
|
* this submission.
|
|
*/
|
|
return rcu_dereference_protected(rq->timeline,
|
|
lockdep_is_held(&rq->engine->sched_engine->lock));
|
|
}
|
|
|
|
static inline u32
|
|
i915_request_active_seqno(const struct i915_request *rq)
|
|
{
|
|
u32 hwsp_phys_base =
|
|
page_mask_bits(i915_request_active_timeline(rq)->hwsp_offset);
|
|
u32 hwsp_relative_offset = offset_in_page(rq->hwsp_seqno);
|
|
|
|
/*
|
|
* Because of wraparound, we cannot simply take tl->hwsp_offset,
|
|
* but instead use the fact that the relative for vaddr is the
|
|
* offset as for hwsp_offset. Take the top bits from tl->hwsp_offset
|
|
* and combine them with the relative offset in rq->hwsp_seqno.
|
|
*
|
|
* As rw->hwsp_seqno is rewritten when signaled, this only works
|
|
* when the request isn't signaled yet, but at that point you
|
|
* no longer need the offset.
|
|
*/
|
|
|
|
return hwsp_phys_base + hwsp_relative_offset;
|
|
}
|
|
|
|
bool
|
|
i915_request_active_engine(struct i915_request *rq,
|
|
struct intel_engine_cs **active);
|
|
|
|
void i915_request_notify_execute_cb_imm(struct i915_request *rq);
|
|
|
|
enum i915_request_state {
|
|
I915_REQUEST_UNKNOWN = 0,
|
|
I915_REQUEST_COMPLETE,
|
|
I915_REQUEST_PENDING,
|
|
I915_REQUEST_QUEUED,
|
|
I915_REQUEST_ACTIVE,
|
|
};
|
|
|
|
enum i915_request_state i915_test_request_state(struct i915_request *rq);
|
|
|
|
void i915_request_module_exit(void);
|
|
int i915_request_module_init(void);
|
|
|
|
#endif /* I915_REQUEST_H */
|