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6b3671746a
revert commit46ae40b94d("net/mlx5: Let user configure io_eq_size param") revert commita6cb08daa3("net/mlx5: Let user configure event_eq_size param") revert commit5546040619("net/mlx5: Let user configure max_macs param") The EQE parameters are applicable to more drivers, they should be configured via standard API, probably ethtool. Example of another driver needing something similar: https://lore.kernel.org/all/1633454136-14679-3-git-send-email-sbhatta@marvell.com/ The last param for "max_macs" is probably fine but the documentation is severely lacking. The meaning and implications for changing the param need to be stated. Link: https://lore.kernel.org/r/20211026152939.3125950-1-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
63 lines
1.7 KiB
C
63 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
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/* Copyright (c) 2018 Mellanox Technologies. */
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#ifndef MLX5_CORE_EQ_H
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#define MLX5_CORE_EQ_H
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#define MLX5_NUM_CMD_EQE (32)
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#define MLX5_NUM_ASYNC_EQE (0x1000)
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#define MLX5_NUM_SPARE_EQE (0x80)
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struct mlx5_eq;
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struct mlx5_core_dev;
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struct mlx5_eq_param {
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u8 irq_index;
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int nent;
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u64 mask[4];
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cpumask_var_t affinity;
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};
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struct mlx5_eq *
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mlx5_eq_create_generic(struct mlx5_core_dev *dev, struct mlx5_eq_param *param);
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int
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mlx5_eq_destroy_generic(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
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int mlx5_eq_enable(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
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struct notifier_block *nb);
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void mlx5_eq_disable(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
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struct notifier_block *nb);
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struct mlx5_eqe *mlx5_eq_get_eqe(struct mlx5_eq *eq, u32 cc);
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void mlx5_eq_update_ci(struct mlx5_eq *eq, u32 cc, bool arm);
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/* The HCA will think the queue has overflowed if we
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* don't tell it we've been processing events. We
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* create EQs with MLX5_NUM_SPARE_EQE extra entries,
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* so we must update our consumer index at
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* least that often.
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*
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* mlx5_eq_update_cc must be called on every EQE @EQ irq handler
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*/
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static inline u32 mlx5_eq_update_cc(struct mlx5_eq *eq, u32 cc)
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{
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if (unlikely(cc >= MLX5_NUM_SPARE_EQE)) {
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mlx5_eq_update_ci(eq, cc, 0);
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cc = 0;
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}
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return cc;
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}
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struct mlx5_nb {
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struct notifier_block nb;
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u8 event_type;
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};
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#define mlx5_nb_cof(ptr, type, member) \
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(container_of(container_of(ptr, struct mlx5_nb, nb), type, member))
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#define MLX5_NB_INIT(name, handler, event) do { \
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(name)->nb.notifier_call = handler; \
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(name)->event_type = MLX5_EVENT_TYPE_##event; \
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} while (0)
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#endif /* MLX5_CORE_EQ_H */
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