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![Kamil Debski](/assets/img/avatar_default.png)
Add a new driver for the Exynos USB 2.0 PHY. The new driver uses the generic PHY framework. The driver includes support for the Exynos 4x10 and 4x12 SoC families. Signed-off-by: Kamil Debski <k.debski@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
135 lines
4.8 KiB
Text
135 lines
4.8 KiB
Text
.------------------------------------------------------------------------------+
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| Samsung USB 2.0 PHY adaptation layer |
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+-----------------------------------------------------------------------------+'
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| 1. Description
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+----------------
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The architecture of the USB 2.0 PHY module in Samsung SoCs is similar
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among many SoCs. In spite of the similarities it proved difficult to
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create a one driver that would fit all these PHY controllers. Often
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the differences were minor and were found in particular bits of the
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registers of the PHY. In some rare cases the order of register writes or
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the PHY powering up process had to be altered. This adaptation layer is
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a compromise between having separate drivers and having a single driver
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with added support for many special cases.
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| 2. Files description
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+----------------------
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- phy-samsung-usb2.c
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This is the main file of the adaptation layer. This file contains
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the probe function and provides two callbacks to the Generic PHY
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Framework. This two callbacks are used to power on and power off the
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phy. They carry out the common work that has to be done on all version
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of the PHY module. Depending on which SoC was chosen they execute SoC
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specific callbacks. The specific SoC version is selected by choosing
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the appropriate compatible string. In addition, this file contains
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struct of_device_id definitions for particular SoCs.
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- phy-samsung-usb2.h
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This is the include file. It declares the structures used by this
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driver. In addition it should contain extern declarations for
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structures that describe particular SoCs.
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| 3. Supporting SoCs
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+--------------------
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To support a new SoC a new file should be added to the drivers/phy
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directory. Each SoC's configuration is stored in an instance of the
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struct samsung_usb2_phy_config.
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struct samsung_usb2_phy_config {
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const struct samsung_usb2_common_phy *phys;
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int (*rate_to_clk)(unsigned long, u32 *);
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unsigned int num_phys;
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bool has_mode_switch;
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};
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The num_phys is the number of phys handled by the driver. *phys is an
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array that contains the configuration for each phy. The has_mode_switch
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property is a boolean flag that determines whether the SoC has USB host
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and device on a single pair of pins. If so, a special register has to
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be modified to change the internal routing of these pins between a USB
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device or host module.
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For example the configuration for Exynos 4210 is following:
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const struct samsung_usb2_phy_config exynos4210_usb2_phy_config = {
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.has_mode_switch = 0,
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.num_phys = EXYNOS4210_NUM_PHYS,
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.phys = exynos4210_phys,
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.rate_to_clk = exynos4210_rate_to_clk,
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}
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- int (*rate_to_clk)(unsigned long, u32 *)
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The rate_to_clk callback is to convert the rate of the clock
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used as the reference clock for the PHY module to the value
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that should be written in the hardware register.
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The exynos4210_phys configuration array is as follows:
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static const struct samsung_usb2_common_phy exynos4210_phys[] = {
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{
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.label = "device",
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.id = EXYNOS4210_DEVICE,
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.power_on = exynos4210_power_on,
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.power_off = exynos4210_power_off,
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},
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{
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.label = "host",
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.id = EXYNOS4210_HOST,
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.power_on = exynos4210_power_on,
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.power_off = exynos4210_power_off,
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},
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{
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.label = "hsic0",
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.id = EXYNOS4210_HSIC0,
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.power_on = exynos4210_power_on,
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.power_off = exynos4210_power_off,
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},
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{
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.label = "hsic1",
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.id = EXYNOS4210_HSIC1,
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.power_on = exynos4210_power_on,
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.power_off = exynos4210_power_off,
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},
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{},
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};
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- int (*power_on)(struct samsung_usb2_phy_instance *);
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- int (*power_off)(struct samsung_usb2_phy_instance *);
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These two callbacks are used to power on and power off the phy
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by modifying appropriate registers.
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Final change to the driver is adding appropriate compatible value to the
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phy-samsung-usb2.c file. In case of Exynos 4210 the following lines were
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added to the struct of_device_id samsung_usb2_phy_of_match[] array:
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#ifdef CONFIG_PHY_EXYNOS4210_USB2
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{
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.compatible = "samsung,exynos4210-usb2-phy",
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.data = &exynos4210_usb2_phy_config,
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},
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#endif
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To add further flexibility to the driver the Kconfig file enables to
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include support for selected SoCs in the compiled driver. The Kconfig
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entry for Exynos 4210 is following:
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config PHY_EXYNOS4210_USB2
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bool "Support for Exynos 4210"
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depends on PHY_SAMSUNG_USB2
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depends on CPU_EXYNOS4210
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help
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Enable USB PHY support for Exynos 4210. This option requires that
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Samsung USB 2.0 PHY driver is enabled and means that support for this
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particular SoC is compiled in the driver. In case of Exynos 4210 four
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phys are available - device, host, HSCI0 and HSCI1.
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The newly created file that supports the new SoC has to be also added to the
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Makefile. In case of Exynos 4210 the added line is following:
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obj-$(CONFIG_PHY_EXYNOS4210_USB2) += phy-exynos4210-usb2.o
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After completing these steps the support for the new SoC should be ready.
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