mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-11-01 00:48:50 +00:00
57c78a234e
- Support for 32-bit tasks on asymmetric AArch32 systems (on top of the scheduler changes merged via the tip tree). - More entry.S clean-ups and conversion to C. - MTE updates: allow a preferred tag checking mode to be set per CPU (the overhead of synchronous mode is smaller for some CPUs than others); optimisations for kernel entry/exit path; optionally disable MTE on the kernel command line. - Kselftest improvements for SVE and signal handling, PtrAuth. - Fix unlikely race where a TLBI could use stale ASID on an ASID roll-over (found by inspection). - Miscellaneous fixes: disable trapping of PMSNEVFR_EL1 to higher exception levels; drop unnecessary sigdelsetmask() call in the signal32 handling; remove BUG_ON when failing to allocate SVE state (just signal the process); SYM_CODE annotations. - Other trivial clean-ups: use macros instead of magic numbers, remove redundant returns, typos. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmEuYkoACgkQa9axLQDI XvEWVw/9HSWbccLrQ68ulaqZkL4r6lL2RqvZ2p6fkIRW7bX1JS4UJjWe3+VBg5Ed DQ1A5cHC5ZndQ4gCRsUhcq7IMXBSj3twMzK7yxBk3zh8tbhVrIOONsKMurMw1NyM OmoyTJ01i2ZrkDs0OU3fBlvIHPxBjKbOZqykOJHjrB2rwBSbsyUw2KvpM7ha8DOf O7gKViDrdAhumdIL9rsMvSiIPoJLCxvqeu55c3saVu1JrUR6ENu7lMu3jt4WrfK3 m5gf76IFbgxXvlLiC8RJW7OYaXZ+COb7RA/yP/lK+Y0ug9PwqTpzXDwqvAp8nBIv y7DK0umcBwfDWmwnRO+ZzNPjOGTHnOnjC07WNBPn3v03pMeJ8v8RnvzHkliek31P r6uFWBxWO/O0sBbSpR+4tzgNfir0RkMajwL5pxQCEMoPCucStYQQl8zIeJeJecpT DKIyKzfFw6O59gdhE6dCj2wXH8YmKUoSUPCAXpKGzK/oYVOGVQTZSZjIC++ydFWv AOXz77etPidk3/Tl15Ena7fkkMkxX9UM8dTjOFS64mSWlEyzE6FtfAgm2rIEOaG7 ps6IjVzVves39SC+yry8T2L6gsxPnanRfwKKCWHkovQzNFgs5Qt51Fd5eIeI1jZ0 uEZhd19FN4136QhjWJOeXL/eyj0bv1WLX/mUln95sHnKyf4je9w= =X6Wm -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: - Support for 32-bit tasks on asymmetric AArch32 systems (on top of the scheduler changes merged via the tip tree). - More entry.S clean-ups and conversion to C. - MTE updates: allow a preferred tag checking mode to be set per CPU (the overhead of synchronous mode is smaller for some CPUs than others); optimisations for kernel entry/exit path; optionally disable MTE on the kernel command line. - Kselftest improvements for SVE and signal handling, PtrAuth. - Fix unlikely race where a TLBI could use stale ASID on an ASID roll-over (found by inspection). - Miscellaneous fixes: disable trapping of PMSNEVFR_EL1 to higher exception levels; drop unnecessary sigdelsetmask() call in the signal32 handling; remove BUG_ON when failing to allocate SVE state (just signal the process); SYM_CODE annotations. - Other trivial clean-ups: use macros instead of magic numbers, remove redundant returns, typos. * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (56 commits) arm64: Do not trap PMSNEVFR_EL1 arm64: mm: fix comment typo of pud_offset_phys() arm64: signal32: Drop pointless call to sigdelsetmask() arm64/sve: Better handle failure to allocate SVE register storage arm64: Document the requirement for SCR_EL3.HCE arm64: head: avoid over-mapping in map_memory arm64/sve: Add a comment documenting the binutils needed for SVE asm arm64/sve: Add some comments for sve_save/load_state() kselftest/arm64: signal: Add a TODO list for signal handling tests kselftest/arm64: signal: Add test case for SVE register state in signals kselftest/arm64: signal: Verify that signals can't change the SVE vector length kselftest/arm64: signal: Check SVE signal frame shows expected vector length kselftest/arm64: signal: Support signal frames with SVE register data kselftest/arm64: signal: Add SVE to the set of features we can check for arm64: replace in_irq() with in_hardirq() kselftest/arm64: pac: Fix skipping of tests on systems without PAC Documentation: arm64: describe asymmetric 32-bit support arm64: Remove logic to kill 32-bit tasks on 64-bit-only cores arm64: Hook up cmdline parameter to allow mismatched 32-bit EL0 arm64: Advertise CPUs capable of running 32-bit applications in sysfs ...
494 lines
14 KiB
C
494 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Based on arch/arm/kernel/signal.c
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*
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* Copyright (C) 1995-2009 Russell King
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* Copyright (C) 2012 ARM Ltd.
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* Modified by Will Deacon <will.deacon@arm.com>
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*/
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#include <linux/compat.h>
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#include <linux/signal.h>
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#include <linux/syscalls.h>
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#include <linux/ratelimit.h>
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#include <asm/esr.h>
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#include <asm/fpsimd.h>
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#include <asm/signal32.h>
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#include <asm/traps.h>
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#include <linux/uaccess.h>
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#include <asm/unistd.h>
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#include <asm/vdso.h>
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struct compat_vfp_sigframe {
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compat_ulong_t magic;
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compat_ulong_t size;
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struct compat_user_vfp {
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compat_u64 fpregs[32];
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compat_ulong_t fpscr;
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} ufp;
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struct compat_user_vfp_exc {
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compat_ulong_t fpexc;
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compat_ulong_t fpinst;
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compat_ulong_t fpinst2;
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} ufp_exc;
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} __attribute__((__aligned__(8)));
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#define VFP_MAGIC 0x56465001
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#define VFP_STORAGE_SIZE sizeof(struct compat_vfp_sigframe)
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#define FSR_WRITE_SHIFT (11)
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struct compat_aux_sigframe {
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struct compat_vfp_sigframe vfp;
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/* Something that isn't a valid magic number for any coprocessor. */
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unsigned long end_magic;
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} __attribute__((__aligned__(8)));
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static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
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{
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compat_sigset_t cset;
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cset.sig[0] = set->sig[0] & 0xffffffffull;
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cset.sig[1] = set->sig[0] >> 32;
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return copy_to_user(uset, &cset, sizeof(*uset));
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}
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static inline int get_sigset_t(sigset_t *set,
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const compat_sigset_t __user *uset)
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{
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compat_sigset_t s32;
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if (copy_from_user(&s32, uset, sizeof(*uset)))
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return -EFAULT;
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set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32);
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return 0;
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}
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/*
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* VFP save/restore code.
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*
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* We have to be careful with endianness, since the fpsimd context-switch
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* code operates on 128-bit (Q) register values whereas the compat ABI
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* uses an array of 64-bit (D) registers. Consequently, we need to swap
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* the two halves of each Q register when running on a big-endian CPU.
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*/
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union __fpsimd_vreg {
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__uint128_t raw;
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struct {
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#ifdef __AARCH64EB__
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u64 hi;
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u64 lo;
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#else
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u64 lo;
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u64 hi;
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#endif
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};
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};
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static int compat_preserve_vfp_context(struct compat_vfp_sigframe __user *frame)
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{
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struct user_fpsimd_state const *fpsimd =
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¤t->thread.uw.fpsimd_state;
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compat_ulong_t magic = VFP_MAGIC;
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compat_ulong_t size = VFP_STORAGE_SIZE;
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compat_ulong_t fpscr, fpexc;
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int i, err = 0;
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/*
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* Save the hardware registers to the fpsimd_state structure.
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* Note that this also saves V16-31, which aren't visible
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* in AArch32.
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*/
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fpsimd_signal_preserve_current_state();
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/* Place structure header on the stack */
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__put_user_error(magic, &frame->magic, err);
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__put_user_error(size, &frame->size, err);
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/*
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* Now copy the FP registers. Since the registers are packed,
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* we can copy the prefix we want (V0-V15) as it is.
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*/
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for (i = 0; i < ARRAY_SIZE(frame->ufp.fpregs); i += 2) {
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union __fpsimd_vreg vreg = {
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.raw = fpsimd->vregs[i >> 1],
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};
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__put_user_error(vreg.lo, &frame->ufp.fpregs[i], err);
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__put_user_error(vreg.hi, &frame->ufp.fpregs[i + 1], err);
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}
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/* Create an AArch32 fpscr from the fpsr and the fpcr. */
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fpscr = (fpsimd->fpsr & VFP_FPSCR_STAT_MASK) |
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(fpsimd->fpcr & VFP_FPSCR_CTRL_MASK);
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__put_user_error(fpscr, &frame->ufp.fpscr, err);
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/*
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* The exception register aren't available so we fake up a
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* basic FPEXC and zero everything else.
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*/
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fpexc = (1 << 30);
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__put_user_error(fpexc, &frame->ufp_exc.fpexc, err);
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__put_user_error(0, &frame->ufp_exc.fpinst, err);
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__put_user_error(0, &frame->ufp_exc.fpinst2, err);
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return err ? -EFAULT : 0;
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}
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static int compat_restore_vfp_context(struct compat_vfp_sigframe __user *frame)
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{
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struct user_fpsimd_state fpsimd;
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compat_ulong_t magic = VFP_MAGIC;
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compat_ulong_t size = VFP_STORAGE_SIZE;
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compat_ulong_t fpscr;
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int i, err = 0;
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__get_user_error(magic, &frame->magic, err);
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__get_user_error(size, &frame->size, err);
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if (err)
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return -EFAULT;
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if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
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return -EINVAL;
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/* Copy the FP registers into the start of the fpsimd_state. */
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for (i = 0; i < ARRAY_SIZE(frame->ufp.fpregs); i += 2) {
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union __fpsimd_vreg vreg;
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__get_user_error(vreg.lo, &frame->ufp.fpregs[i], err);
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__get_user_error(vreg.hi, &frame->ufp.fpregs[i + 1], err);
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fpsimd.vregs[i >> 1] = vreg.raw;
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}
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/* Extract the fpsr and the fpcr from the fpscr */
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__get_user_error(fpscr, &frame->ufp.fpscr, err);
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fpsimd.fpsr = fpscr & VFP_FPSCR_STAT_MASK;
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fpsimd.fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
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/*
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* We don't need to touch the exception register, so
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* reload the hardware state.
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*/
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if (!err)
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fpsimd_update_current_state(&fpsimd);
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return err ? -EFAULT : 0;
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}
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static int compat_restore_sigframe(struct pt_regs *regs,
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struct compat_sigframe __user *sf)
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{
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int err;
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sigset_t set;
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struct compat_aux_sigframe __user *aux;
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unsigned long psr;
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err = get_sigset_t(&set, &sf->uc.uc_sigmask);
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if (err == 0)
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set_current_blocked(&set);
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__get_user_error(regs->regs[0], &sf->uc.uc_mcontext.arm_r0, err);
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__get_user_error(regs->regs[1], &sf->uc.uc_mcontext.arm_r1, err);
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__get_user_error(regs->regs[2], &sf->uc.uc_mcontext.arm_r2, err);
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__get_user_error(regs->regs[3], &sf->uc.uc_mcontext.arm_r3, err);
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__get_user_error(regs->regs[4], &sf->uc.uc_mcontext.arm_r4, err);
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__get_user_error(regs->regs[5], &sf->uc.uc_mcontext.arm_r5, err);
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__get_user_error(regs->regs[6], &sf->uc.uc_mcontext.arm_r6, err);
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__get_user_error(regs->regs[7], &sf->uc.uc_mcontext.arm_r7, err);
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__get_user_error(regs->regs[8], &sf->uc.uc_mcontext.arm_r8, err);
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__get_user_error(regs->regs[9], &sf->uc.uc_mcontext.arm_r9, err);
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__get_user_error(regs->regs[10], &sf->uc.uc_mcontext.arm_r10, err);
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__get_user_error(regs->regs[11], &sf->uc.uc_mcontext.arm_fp, err);
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__get_user_error(regs->regs[12], &sf->uc.uc_mcontext.arm_ip, err);
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__get_user_error(regs->compat_sp, &sf->uc.uc_mcontext.arm_sp, err);
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__get_user_error(regs->compat_lr, &sf->uc.uc_mcontext.arm_lr, err);
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__get_user_error(regs->pc, &sf->uc.uc_mcontext.arm_pc, err);
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__get_user_error(psr, &sf->uc.uc_mcontext.arm_cpsr, err);
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regs->pstate = compat_psr_to_pstate(psr);
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/*
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* Avoid compat_sys_sigreturn() restarting.
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*/
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forget_syscall(regs);
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err |= !valid_user_regs(®s->user_regs, current);
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aux = (struct compat_aux_sigframe __user *) sf->uc.uc_regspace;
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if (err == 0 && system_supports_fpsimd())
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err |= compat_restore_vfp_context(&aux->vfp);
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return err;
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}
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COMPAT_SYSCALL_DEFINE0(sigreturn)
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{
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struct pt_regs *regs = current_pt_regs();
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struct compat_sigframe __user *frame;
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/* Always make any pending restarted system calls return -EINTR */
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current->restart_block.fn = do_no_restart_syscall;
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/*
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* Since we stacked the signal on a 64-bit boundary,
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* then 'sp' should be word aligned here. If it's
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* not, then the user is trying to mess with us.
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*/
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if (regs->compat_sp & 7)
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goto badframe;
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frame = (struct compat_sigframe __user *)regs->compat_sp;
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if (!access_ok(frame, sizeof (*frame)))
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goto badframe;
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if (compat_restore_sigframe(regs, frame))
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goto badframe;
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return regs->regs[0];
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badframe:
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arm64_notify_segfault(regs->compat_sp);
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return 0;
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}
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COMPAT_SYSCALL_DEFINE0(rt_sigreturn)
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{
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struct pt_regs *regs = current_pt_regs();
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struct compat_rt_sigframe __user *frame;
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/* Always make any pending restarted system calls return -EINTR */
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current->restart_block.fn = do_no_restart_syscall;
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/*
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* Since we stacked the signal on a 64-bit boundary,
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* then 'sp' should be word aligned here. If it's
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* not, then the user is trying to mess with us.
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*/
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if (regs->compat_sp & 7)
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goto badframe;
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frame = (struct compat_rt_sigframe __user *)regs->compat_sp;
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if (!access_ok(frame, sizeof (*frame)))
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goto badframe;
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if (compat_restore_sigframe(regs, &frame->sig))
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goto badframe;
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if (compat_restore_altstack(&frame->sig.uc.uc_stack))
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goto badframe;
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return regs->regs[0];
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badframe:
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arm64_notify_segfault(regs->compat_sp);
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return 0;
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}
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static void __user *compat_get_sigframe(struct ksignal *ksig,
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struct pt_regs *regs,
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int framesize)
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{
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compat_ulong_t sp = sigsp(regs->compat_sp, ksig);
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void __user *frame;
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/*
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* ATPCS B01 mandates 8-byte alignment
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*/
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frame = compat_ptr((compat_uptr_t)((sp - framesize) & ~7));
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/*
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* Check that we can actually write to the signal frame.
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*/
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if (!access_ok(frame, framesize))
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frame = NULL;
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return frame;
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}
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static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
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compat_ulong_t __user *rc, void __user *frame,
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int usig)
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{
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compat_ulong_t handler = ptr_to_compat(ka->sa.sa_handler);
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compat_ulong_t retcode;
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compat_ulong_t spsr = regs->pstate & ~(PSR_f | PSR_AA32_E_BIT);
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int thumb;
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/* Check if the handler is written for ARM or Thumb */
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thumb = handler & 1;
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if (thumb)
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spsr |= PSR_AA32_T_BIT;
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else
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spsr &= ~PSR_AA32_T_BIT;
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/* The IT state must be cleared for both ARM and Thumb-2 */
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spsr &= ~PSR_AA32_IT_MASK;
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/* Restore the original endianness */
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spsr |= PSR_AA32_ENDSTATE;
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if (ka->sa.sa_flags & SA_RESTORER) {
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retcode = ptr_to_compat(ka->sa.sa_restorer);
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} else {
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/* Set up sigreturn pointer */
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unsigned int idx = thumb << 1;
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if (ka->sa.sa_flags & SA_SIGINFO)
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idx += 3;
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retcode = (unsigned long)current->mm->context.sigpage +
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(idx << 2) + thumb;
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}
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regs->regs[0] = usig;
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regs->compat_sp = ptr_to_compat(frame);
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regs->compat_lr = retcode;
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regs->pc = handler;
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regs->pstate = spsr;
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}
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static int compat_setup_sigframe(struct compat_sigframe __user *sf,
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struct pt_regs *regs, sigset_t *set)
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{
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struct compat_aux_sigframe __user *aux;
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unsigned long psr = pstate_to_compat_psr(regs->pstate);
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int err = 0;
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__put_user_error(regs->regs[0], &sf->uc.uc_mcontext.arm_r0, err);
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__put_user_error(regs->regs[1], &sf->uc.uc_mcontext.arm_r1, err);
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__put_user_error(regs->regs[2], &sf->uc.uc_mcontext.arm_r2, err);
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__put_user_error(regs->regs[3], &sf->uc.uc_mcontext.arm_r3, err);
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__put_user_error(regs->regs[4], &sf->uc.uc_mcontext.arm_r4, err);
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__put_user_error(regs->regs[5], &sf->uc.uc_mcontext.arm_r5, err);
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__put_user_error(regs->regs[6], &sf->uc.uc_mcontext.arm_r6, err);
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__put_user_error(regs->regs[7], &sf->uc.uc_mcontext.arm_r7, err);
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__put_user_error(regs->regs[8], &sf->uc.uc_mcontext.arm_r8, err);
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__put_user_error(regs->regs[9], &sf->uc.uc_mcontext.arm_r9, err);
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__put_user_error(regs->regs[10], &sf->uc.uc_mcontext.arm_r10, err);
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__put_user_error(regs->regs[11], &sf->uc.uc_mcontext.arm_fp, err);
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__put_user_error(regs->regs[12], &sf->uc.uc_mcontext.arm_ip, err);
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__put_user_error(regs->compat_sp, &sf->uc.uc_mcontext.arm_sp, err);
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|
__put_user_error(regs->compat_lr, &sf->uc.uc_mcontext.arm_lr, err);
|
|
__put_user_error(regs->pc, &sf->uc.uc_mcontext.arm_pc, err);
|
|
__put_user_error(psr, &sf->uc.uc_mcontext.arm_cpsr, err);
|
|
|
|
__put_user_error((compat_ulong_t)0, &sf->uc.uc_mcontext.trap_no, err);
|
|
/* set the compat FSR WnR */
|
|
__put_user_error(!!(current->thread.fault_code & ESR_ELx_WNR) <<
|
|
FSR_WRITE_SHIFT, &sf->uc.uc_mcontext.error_code, err);
|
|
__put_user_error(current->thread.fault_address, &sf->uc.uc_mcontext.fault_address, err);
|
|
__put_user_error(set->sig[0], &sf->uc.uc_mcontext.oldmask, err);
|
|
|
|
err |= put_sigset_t(&sf->uc.uc_sigmask, set);
|
|
|
|
aux = (struct compat_aux_sigframe __user *) sf->uc.uc_regspace;
|
|
|
|
if (err == 0 && system_supports_fpsimd())
|
|
err |= compat_preserve_vfp_context(&aux->vfp);
|
|
__put_user_error(0, &aux->end_magic, err);
|
|
|
|
return err;
|
|
}
|
|
|
|
/*
|
|
* 32-bit signal handling routines called from signal.c
|
|
*/
|
|
int compat_setup_rt_frame(int usig, struct ksignal *ksig,
|
|
sigset_t *set, struct pt_regs *regs)
|
|
{
|
|
struct compat_rt_sigframe __user *frame;
|
|
int err = 0;
|
|
|
|
frame = compat_get_sigframe(ksig, regs, sizeof(*frame));
|
|
|
|
if (!frame)
|
|
return 1;
|
|
|
|
err |= copy_siginfo_to_user32(&frame->info, &ksig->info);
|
|
|
|
__put_user_error(0, &frame->sig.uc.uc_flags, err);
|
|
__put_user_error(0, &frame->sig.uc.uc_link, err);
|
|
|
|
err |= __compat_save_altstack(&frame->sig.uc.uc_stack, regs->compat_sp);
|
|
|
|
err |= compat_setup_sigframe(&frame->sig, regs, set);
|
|
|
|
if (err == 0) {
|
|
compat_setup_return(regs, &ksig->ka, frame->sig.retcode, frame, usig);
|
|
regs->regs[1] = (compat_ulong_t)(unsigned long)&frame->info;
|
|
regs->regs[2] = (compat_ulong_t)(unsigned long)&frame->sig.uc;
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
int compat_setup_frame(int usig, struct ksignal *ksig, sigset_t *set,
|
|
struct pt_regs *regs)
|
|
{
|
|
struct compat_sigframe __user *frame;
|
|
int err = 0;
|
|
|
|
frame = compat_get_sigframe(ksig, regs, sizeof(*frame));
|
|
|
|
if (!frame)
|
|
return 1;
|
|
|
|
__put_user_error(0x5ac3c35a, &frame->uc.uc_flags, err);
|
|
|
|
err |= compat_setup_sigframe(frame, regs, set);
|
|
if (err == 0)
|
|
compat_setup_return(regs, &ksig->ka, frame->retcode, frame, usig);
|
|
|
|
return err;
|
|
}
|
|
|
|
void compat_setup_restart_syscall(struct pt_regs *regs)
|
|
{
|
|
regs->regs[7] = __NR_compat_restart_syscall;
|
|
}
|
|
|
|
/*
|
|
* Compile-time assertions for siginfo_t offsets. Check NSIG* as well, as
|
|
* changes likely come with new fields that should be added below.
|
|
*/
|
|
static_assert(NSIGILL == 11);
|
|
static_assert(NSIGFPE == 15);
|
|
static_assert(NSIGSEGV == 9);
|
|
static_assert(NSIGBUS == 5);
|
|
static_assert(NSIGTRAP == 6);
|
|
static_assert(NSIGCHLD == 6);
|
|
static_assert(NSIGSYS == 2);
|
|
static_assert(sizeof(compat_siginfo_t) == 128);
|
|
static_assert(__alignof__(compat_siginfo_t) == 4);
|
|
static_assert(offsetof(compat_siginfo_t, si_signo) == 0x00);
|
|
static_assert(offsetof(compat_siginfo_t, si_errno) == 0x04);
|
|
static_assert(offsetof(compat_siginfo_t, si_code) == 0x08);
|
|
static_assert(offsetof(compat_siginfo_t, si_pid) == 0x0c);
|
|
static_assert(offsetof(compat_siginfo_t, si_uid) == 0x10);
|
|
static_assert(offsetof(compat_siginfo_t, si_tid) == 0x0c);
|
|
static_assert(offsetof(compat_siginfo_t, si_overrun) == 0x10);
|
|
static_assert(offsetof(compat_siginfo_t, si_status) == 0x14);
|
|
static_assert(offsetof(compat_siginfo_t, si_utime) == 0x18);
|
|
static_assert(offsetof(compat_siginfo_t, si_stime) == 0x1c);
|
|
static_assert(offsetof(compat_siginfo_t, si_value) == 0x14);
|
|
static_assert(offsetof(compat_siginfo_t, si_int) == 0x14);
|
|
static_assert(offsetof(compat_siginfo_t, si_ptr) == 0x14);
|
|
static_assert(offsetof(compat_siginfo_t, si_addr) == 0x0c);
|
|
static_assert(offsetof(compat_siginfo_t, si_addr_lsb) == 0x10);
|
|
static_assert(offsetof(compat_siginfo_t, si_lower) == 0x14);
|
|
static_assert(offsetof(compat_siginfo_t, si_upper) == 0x18);
|
|
static_assert(offsetof(compat_siginfo_t, si_pkey) == 0x14);
|
|
static_assert(offsetof(compat_siginfo_t, si_perf_data) == 0x10);
|
|
static_assert(offsetof(compat_siginfo_t, si_perf_type) == 0x14);
|
|
static_assert(offsetof(compat_siginfo_t, si_band) == 0x0c);
|
|
static_assert(offsetof(compat_siginfo_t, si_fd) == 0x10);
|
|
static_assert(offsetof(compat_siginfo_t, si_call_addr) == 0x0c);
|
|
static_assert(offsetof(compat_siginfo_t, si_syscall) == 0x10);
|
|
static_assert(offsetof(compat_siginfo_t, si_arch) == 0x14);
|