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27b2e76dbc
Implement more generic quirk registers than just limit and capability registers. This comes with the expense of a little bit more access time so these should be only used when really needed. Signed-off-by: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
306 lines
8.8 KiB
C
306 lines
8.8 KiB
C
/*
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* drivers/media/video/smiapp/smiapp-quirk.c
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*
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* Generic driver for SMIA/SMIA++ compliant camera modules
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*
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* Copyright (C) 2011--2012 Nokia Corporation
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* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <linux/delay.h>
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#include "smiapp.h"
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static int smiapp_write_8(struct smiapp_sensor *sensor, u16 reg, u8 val)
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{
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return smiapp_write(sensor, (SMIA_REG_8BIT << 16) | reg, val);
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}
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static int smiapp_write_8s(struct smiapp_sensor *sensor,
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struct smiapp_reg_8 *regs, int len)
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{
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struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
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int rval;
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for (; len > 0; len--, regs++) {
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rval = smiapp_write_8(sensor, regs->reg, regs->val);
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if (rval < 0) {
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dev_err(&client->dev,
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"error %d writing reg 0x%4.4x, val 0x%2.2x",
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rval, regs->reg, regs->val);
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return rval;
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}
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}
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return 0;
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}
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void smiapp_replace_limit(struct smiapp_sensor *sensor,
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u32 limit, u32 val)
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{
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struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
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dev_dbg(&client->dev, "quirk: 0x%8.8x \"%s\" = %d, 0x%x\n",
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smiapp_reg_limits[limit].addr,
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smiapp_reg_limits[limit].what, val, val);
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sensor->limits[limit] = val;
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}
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int smiapp_replace_limit_at(struct smiapp_sensor *sensor,
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u32 reg, u32 val)
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{
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struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
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int i;
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for (i = 0; smiapp_reg_limits[i].addr; i++) {
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if ((smiapp_reg_limits[i].addr & 0xffff) != reg)
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continue;
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smiapp_replace_limit(sensor, i, val);
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return 0;
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}
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dev_dbg(&client->dev, "quirk: bad register 0x%4.4x\n", reg);
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return -EINVAL;
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}
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bool smiapp_quirk_reg(struct smiapp_sensor *sensor,
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u32 reg, u32 *val)
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{
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struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
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const struct smia_reg *sreg;
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if (!sensor->minfo.quirk)
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return false;
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sreg = sensor->minfo.quirk->regs;
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if (!sreg)
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return false;
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while (sreg->type) {
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u16 type = reg >> 16;
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u16 reg16 = reg;
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if (sreg->type != type || sreg->reg != reg16) {
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sreg++;
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continue;
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}
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switch ((u8)type) {
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case SMIA_REG_8BIT:
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dev_dbg(&client->dev, "quirk: 0x%8.8x: 0x%2.2x\n",
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reg, sreg->val);
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break;
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case SMIA_REG_16BIT:
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dev_dbg(&client->dev, "quirk: 0x%8.8x: 0x%4.4x\n",
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reg, sreg->val);
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break;
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case SMIA_REG_32BIT:
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dev_dbg(&client->dev, "quirk: 0x%8.8x: 0x%8.8x\n",
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reg, sreg->val);
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break;
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}
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*val = sreg->val;
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return true;
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}
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return false;
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}
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static int jt8ew9_limits(struct smiapp_sensor *sensor)
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{
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if (sensor->minfo.revision_number_major < 0x03)
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sensor->frame_skip = 1;
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/* Below 24 gain doesn't have effect at all, */
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/* but ~59 is needed for full dynamic range */
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smiapp_replace_limit(sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MIN, 59);
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smiapp_replace_limit(
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sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MAX, 6000);
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return 0;
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}
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static int jt8ew9_post_poweron(struct smiapp_sensor *sensor)
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{
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struct smiapp_reg_8 regs[] = {
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{ 0x30a3, 0xd8 }, /* Output port control : LVDS ports only */
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{ 0x30ae, 0x00 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */
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{ 0x30af, 0xd0 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */
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{ 0x322d, 0x04 }, /* Adjusting Processing Image Size to Scaler Toshiba Recommendation Setting */
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{ 0x3255, 0x0f }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
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{ 0x3256, 0x15 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
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{ 0x3258, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */
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{ 0x3259, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */
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{ 0x325f, 0x7c }, /* Analog Gain Control Toshiba Recommendation Setting */
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{ 0x3302, 0x06 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
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{ 0x3304, 0x00 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
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{ 0x3307, 0x22 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
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{ 0x3308, 0x8d }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
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{ 0x331e, 0x0f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
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{ 0x3320, 0x30 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
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{ 0x3321, 0x11 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
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{ 0x3322, 0x98 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
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{ 0x3323, 0x64 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
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{ 0x3325, 0x83 }, /* Read Out Timing Control Toshiba Recommendation Setting */
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{ 0x3330, 0x18 }, /* Read Out Timing Control Toshiba Recommendation Setting */
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{ 0x333c, 0x01 }, /* Read Out Timing Control Toshiba Recommendation Setting */
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{ 0x3345, 0x2f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
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{ 0x33de, 0x38 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
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/* Taken from v03. No idea what the rest are. */
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{ 0x32e0, 0x05 },
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{ 0x32e1, 0x05 },
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{ 0x32e2, 0x04 },
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{ 0x32e5, 0x04 },
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{ 0x32e6, 0x04 },
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};
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return smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));
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}
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const struct smiapp_quirk smiapp_jt8ew9_quirk = {
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.limits = jt8ew9_limits,
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.post_poweron = jt8ew9_post_poweron,
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};
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static int imx125es_post_poweron(struct smiapp_sensor *sensor)
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{
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/* Taken from v02. No idea what the other two are. */
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struct smiapp_reg_8 regs[] = {
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/*
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* 0x3302: clk during frame blanking:
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* 0x00 - HS mode, 0x01 - LP11
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*/
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{ 0x3302, 0x01 },
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{ 0x302d, 0x00 },
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{ 0x3b08, 0x8c },
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};
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return smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));
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}
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const struct smiapp_quirk smiapp_imx125es_quirk = {
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.post_poweron = imx125es_post_poweron,
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};
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static int jt8ev1_limits(struct smiapp_sensor *sensor)
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{
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smiapp_replace_limit(sensor, SMIAPP_LIMIT_X_ADDR_MAX, 4271);
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smiapp_replace_limit(sensor,
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SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN, 184);
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return 0;
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}
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static int jt8ev1_post_poweron(struct smiapp_sensor *sensor)
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{
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struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
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int rval;
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struct smiapp_reg_8 regs[] = {
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{ 0x3031, 0xcd }, /* For digital binning (EQ_MONI) */
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{ 0x30a3, 0xd0 }, /* FLASH STROBE enable */
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{ 0x3237, 0x00 }, /* For control of pulse timing for ADC */
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{ 0x3238, 0x43 },
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{ 0x3301, 0x06 }, /* For analog bias for sensor */
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{ 0x3302, 0x06 },
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{ 0x3304, 0x00 },
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{ 0x3305, 0x88 },
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{ 0x332a, 0x14 },
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{ 0x332c, 0x6b },
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{ 0x3336, 0x01 },
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{ 0x333f, 0x1f },
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{ 0x3355, 0x00 },
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{ 0x3356, 0x20 },
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{ 0x33bf, 0x20 }, /* Adjust the FBC speed */
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{ 0x33c9, 0x20 },
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{ 0x33ce, 0x30 }, /* Adjust the parameter for logic function */
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{ 0x33cf, 0xec }, /* For Black sun */
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{ 0x3328, 0x80 }, /* Ugh. No idea what's this. */
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};
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struct smiapp_reg_8 regs_96[] = {
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{ 0x30ae, 0x00 }, /* For control of ADC clock */
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{ 0x30af, 0xd0 },
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{ 0x30b0, 0x01 },
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};
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rval = smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));
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if (rval < 0)
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return rval;
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switch (sensor->platform_data->ext_clk) {
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case 9600000:
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return smiapp_write_8s(sensor, regs_96,
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ARRAY_SIZE(regs_96));
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default:
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dev_warn(&client->dev, "no MSRs for %d Hz ext_clk\n",
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sensor->platform_data->ext_clk);
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return 0;
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}
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}
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static int jt8ev1_pre_streamon(struct smiapp_sensor *sensor)
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{
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return smiapp_write_8(sensor, 0x3328, 0x00);
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}
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static int jt8ev1_post_streamoff(struct smiapp_sensor *sensor)
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{
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int rval;
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/* Workaround: allows fast standby to work properly */
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rval = smiapp_write_8(sensor, 0x3205, 0x04);
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if (rval < 0)
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return rval;
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/* Wait for 1 ms + one line => 2 ms is likely enough */
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usleep_range(2000, 2000);
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/* Restore it */
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rval = smiapp_write_8(sensor, 0x3205, 0x00);
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if (rval < 0)
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return rval;
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return smiapp_write_8(sensor, 0x3328, 0x80);
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}
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const struct smiapp_quirk smiapp_jt8ev1_quirk = {
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.limits = jt8ev1_limits,
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.post_poweron = jt8ev1_post_poweron,
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.pre_streamon = jt8ev1_pre_streamon,
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.post_streamoff = jt8ev1_post_streamoff,
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.flags = SMIAPP_QUIRK_FLAG_OP_PIX_CLOCK_PER_LANE,
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};
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static int tcm8500md_limits(struct smiapp_sensor *sensor)
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{
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smiapp_replace_limit(sensor, SMIAPP_LIMIT_MIN_PLL_IP_FREQ_HZ, 2700000);
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return 0;
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}
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const struct smiapp_quirk smiapp_tcm8500md_quirk = {
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.limits = tcm8500md_limits,
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};
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