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48b7bde0f6
There is no need to worry about local APIC. There is need to worry about I/O APIC, because I/O APIC is replacing good old 8259. According to Nehemiah datasheet VIA is using 3-wire bus to connect local APIC to I/O APIC. "[...] When IA32_APIC_BASE[11] is set to 0, processor APICs based on the 3-wire APIC bus cannot be generally re-enabled until a system hardware reset. The 3-wire bus looses track of arbitration that would be necessary for complete re-enabling. Certain (local) APIC functionality can be enabled. [...]" So we must set disable bit for each interrupt in I/O APIC registers. Same situation as for PIC - we must poke registers direcly. How to do this? I don't know. So at the moment it is better to fail. Signed-off-by: Rafa³ Bilski <rafalbilski@interia.pl> Signed-off-by: Dave Jones <davej@redhat.com> |
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| cpufreq | ||
| mcheck | ||
| mtrr | ||
| amd.c | ||
| centaur.c | ||
| common.c | ||
| cpu.h | ||
| cyrix.c | ||
| intel.c | ||
| intel_cacheinfo.c | ||
| Makefile | ||
| nexgen.c | ||
| proc.c | ||
| rise.c | ||
| transmeta.c | ||
| umc.c | ||