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3569d84bb2
The interrupt entry code carefully saves a minimal number of registers, so in some places the TOC is required, it is loaded into a different register, so provide a macro that can supply an alternate TOC register. This continues to use got addressing because TOC-relative results in "got/toc optimization is not supported" messages by the linker. Having r2 be one of the saved registers and using that for TOC addressing may be the best way to avoid that and switch this to TOC addressing. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220926034057.2360083-6-npiggin@gmail.com |
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| .. | ||
| 8xx.c | ||
| 40x.c | ||
| 44x.c | ||
| book3e_pgtable.c | ||
| e500.c | ||
| e500_hugetlbpage.c | ||
| kaslr_booke.c | ||
| kup.c | ||
| Makefile | ||
| mmu_context.c | ||
| tlb.c | ||
| tlb_low.S | ||
| tlb_low_64e.S | ||