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57c78e359a
To make mc13783 and mc13892 share code, the register names should be changed to fit the new macro definitions in the comming patch. Signed-off-by: Yong Shen <yong.shen@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Samuel Ortiz <sameo@linux.intel.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
202 lines
6.2 KiB
C
202 lines
6.2 KiB
C
/*
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* Copyright 2010 Yong Shen <yong.shen@linaro.org>
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* Copyright 2009-2010 Pengutronix
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* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or modify it under
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* the terms of the GNU General Public License version 2 as published by the
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* Free Software Foundation.
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*/
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#ifndef __LINUX_MFD_MC13783_H
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#define __LINUX_MFD_MC13783_H
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#include <linux/mfd/mc13xxx.h>
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struct mc13783;
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struct mc13xxx *mc13783_to_mc13xxx(struct mc13783 *mc13783);
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static inline void mc13783_lock(struct mc13783 *mc13783)
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{
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mc13xxx_lock(mc13783_to_mc13xxx(mc13783));
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}
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static inline void mc13783_unlock(struct mc13783 *mc13783)
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{
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mc13xxx_unlock(mc13783_to_mc13xxx(mc13783));
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}
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static inline int mc13783_reg_read(struct mc13783 *mc13783,
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unsigned int offset, u32 *val)
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{
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return mc13xxx_reg_read(mc13783_to_mc13xxx(mc13783), offset, val);
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}
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static inline int mc13783_reg_write(struct mc13783 *mc13783,
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unsigned int offset, u32 val)
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{
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return mc13xxx_reg_write(mc13783_to_mc13xxx(mc13783), offset, val);
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}
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static inline int mc13783_reg_rmw(struct mc13783 *mc13783,
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unsigned int offset, u32 mask, u32 val)
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{
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return mc13xxx_reg_rmw(mc13783_to_mc13xxx(mc13783), offset, mask, val);
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}
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static inline int mc13783_get_flags(struct mc13783 *mc13783)
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{
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return mc13xxx_get_flags(mc13783_to_mc13xxx(mc13783));
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}
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static inline int mc13783_irq_request(struct mc13783 *mc13783, int irq,
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irq_handler_t handler, const char *name, void *dev)
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{
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return mc13xxx_irq_request(mc13783_to_mc13xxx(mc13783), irq,
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handler, name, dev);
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}
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static inline int mc13783_irq_request_nounmask(struct mc13783 *mc13783, int irq,
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irq_handler_t handler, const char *name, void *dev)
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{
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return mc13xxx_irq_request_nounmask(mc13783_to_mc13xxx(mc13783), irq,
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handler, name, dev);
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}
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static inline int mc13783_irq_free(struct mc13783 *mc13783, int irq, void *dev)
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{
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return mc13xxx_irq_free(mc13783_to_mc13xxx(mc13783), irq, dev);
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}
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static inline int mc13783_irq_mask(struct mc13783 *mc13783, int irq)
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{
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return mc13xxx_irq_mask(mc13783_to_mc13xxx(mc13783), irq);
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}
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static inline int mc13783_irq_unmask(struct mc13783 *mc13783, int irq)
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{
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return mc13xxx_irq_unmask(mc13783_to_mc13xxx(mc13783), irq);
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}
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static inline int mc13783_irq_status(struct mc13783 *mc13783, int irq,
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int *enabled, int *pending)
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{
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return mc13xxx_irq_status(mc13783_to_mc13xxx(mc13783),
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irq, enabled, pending);
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}
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static inline int mc13783_irq_ack(struct mc13783 *mc13783, int irq)
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{
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return mc13xxx_irq_ack(mc13783_to_mc13xxx(mc13783), irq);
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}
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#define MC13783_ADC0 43
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#define MC13783_ADC0_ADREFEN (1 << 10)
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#define MC13783_ADC0_ADREFMODE (1 << 11)
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#define MC13783_ADC0_TSMOD0 (1 << 12)
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#define MC13783_ADC0_TSMOD1 (1 << 13)
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#define MC13783_ADC0_TSMOD2 (1 << 14)
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#define MC13783_ADC0_ADINC1 (1 << 16)
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#define MC13783_ADC0_ADINC2 (1 << 17)
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#define MC13783_ADC0_TSMOD_MASK (MC13783_ADC0_TSMOD0 | \
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MC13783_ADC0_TSMOD1 | \
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MC13783_ADC0_TSMOD2)
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#define mc13783_regulator_init_data mc13xxx_regulator_init_data
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#define mc13783_regulator_platform_data mc13xxx_regulator_platform_data
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#define mc13783_led_platform_data mc13xxx_led_platform_data
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#define mc13783_leds_platform_data mc13xxx_leds_platform_data
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#define mc13783_platform_data mc13xxx_platform_data
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#define MC13783_USE_TOUCHSCREEN MC13XXX_USE_TOUCHSCREEN
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#define MC13783_USE_CODEC MC13XXX_USE_CODEC
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#define MC13783_USE_ADC MC13XXX_USE_ADC
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#define MC13783_USE_RTC MC13XXX_USE_RTC
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#define MC13783_USE_REGULATOR MC13XXX_USE_REGULATOR
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#define MC13783_USE_LED MC13XXX_USE_LED
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#define MC13783_ADC_MODE_TS 1
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#define MC13783_ADC_MODE_SINGLE_CHAN 2
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#define MC13783_ADC_MODE_MULT_CHAN 3
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int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode,
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unsigned int channel, unsigned int *sample);
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#define MC13783_REG_SW1A 0
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#define MC13783_REG_SW1B 1
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#define MC13783_REG_SW2A 2
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#define MC13783_REG_SW2B 3
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#define MC13783_REG_SW3 4
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#define MC13783_REG_PLL 5
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#define MC13783_REG_VAUDIO 6
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#define MC13783_REG_VIOHI 7
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#define MC13783_REG_VIOLO 8
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#define MC13783_REG_VDIG 9
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#define MC13783_REG_VGEN 10
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#define MC13783_REG_VRFDIG 11
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#define MC13783_REG_VRFREF 12
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#define MC13783_REG_VRFCP 13
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#define MC13783_REG_VSIM 14
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#define MC13783_REG_VESIM 15
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#define MC13783_REG_VCAM 16
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#define MC13783_REG_VRFBG 17
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#define MC13783_REG_VVIB 18
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#define MC13783_REG_VRF1 19
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#define MC13783_REG_VRF2 20
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#define MC13783_REG_VMMC1 21
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#define MC13783_REG_VMMC2 22
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#define MC13783_REG_GPO1 23
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#define MC13783_REG_GPO2 24
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#define MC13783_REG_GPO3 25
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#define MC13783_REG_GPO4 26
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#define MC13783_REG_V1 27
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#define MC13783_REG_V2 28
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#define MC13783_REG_V3 29
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#define MC13783_REG_V4 30
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#define MC13783_REG_PWGT1SPI 31
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#define MC13783_REG_PWGT2SPI 32
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#define MC13783_IRQ_ADCDONE MC13XXX_IRQ_ADCDONE
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#define MC13783_IRQ_ADCBISDONE MC13XXX_IRQ_ADCBISDONE
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#define MC13783_IRQ_TS MC13XXX_IRQ_TS
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#define MC13783_IRQ_WHIGH 3
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#define MC13783_IRQ_WLOW 4
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#define MC13783_IRQ_CHGDET MC13XXX_IRQ_CHGDET
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#define MC13783_IRQ_CHGOV 7
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#define MC13783_IRQ_CHGREV MC13XXX_IRQ_CHGREV
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#define MC13783_IRQ_CHGSHORT MC13XXX_IRQ_CHGSHORT
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#define MC13783_IRQ_CCCV MC13XXX_IRQ_CCCV
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#define MC13783_IRQ_CHGCURR MC13XXX_IRQ_CHGCURR
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#define MC13783_IRQ_BPON MC13XXX_IRQ_BPON
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#define MC13783_IRQ_LOBATL MC13XXX_IRQ_LOBATL
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#define MC13783_IRQ_LOBATH MC13XXX_IRQ_LOBATH
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#define MC13783_IRQ_UDP 15
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#define MC13783_IRQ_USB 16
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#define MC13783_IRQ_ID 19
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#define MC13783_IRQ_SE1 21
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#define MC13783_IRQ_CKDET 22
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#define MC13783_IRQ_UDM 23
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#define MC13783_IRQ_1HZ MC13XXX_IRQ_1HZ
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#define MC13783_IRQ_TODA MC13XXX_IRQ_TODA
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#define MC13783_IRQ_ONOFD1 27
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#define MC13783_IRQ_ONOFD2 28
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#define MC13783_IRQ_ONOFD3 29
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#define MC13783_IRQ_SYSRST MC13XXX_IRQ_SYSRST
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#define MC13783_IRQ_RTCRST MC13XXX_IRQ_RTCRST
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#define MC13783_IRQ_PC MC13XXX_IRQ_PC
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#define MC13783_IRQ_WARM MC13XXX_IRQ_WARM
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#define MC13783_IRQ_MEMHLD MC13XXX_IRQ_MEMHLD
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#define MC13783_IRQ_PWRRDY 35
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#define MC13783_IRQ_THWARNL MC13XXX_IRQ_THWARNL
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#define MC13783_IRQ_THWARNH MC13XXX_IRQ_THWARNH
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#define MC13783_IRQ_CLK MC13XXX_IRQ_CLK
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#define MC13783_IRQ_SEMAF 39
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#define MC13783_IRQ_MC2B 41
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#define MC13783_IRQ_HSDET 42
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#define MC13783_IRQ_HSL 43
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#define MC13783_IRQ_ALSPTH 44
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#define MC13783_IRQ_AHSSHORT 45
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#define MC13783_NUM_IRQ MC13XXX_NUM_IRQ
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#endif /* ifndef __LINUX_MFD_MC13783_H */
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