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1a67b9263e
The commit eb1f00237a ("lockdep,trace: Expose tracepoints"), started to
expose us for tracepoints. For imx6q cpuidle, this leads to an RCU splat
according to below.
[6.870684] [<c0db7690>] (_raw_spin_lock) from [<c011f6a4>] (imx6q_enter_wait+0x18/0x9c)
[6.878846] [<c011f6a4>] (imx6q_enter_wait) from [<c09abfb0>] (cpuidle_enter_state+0x168/0x5e4)
To fix the problem, let's assign the corresponding idlestate->flags the
CPUIDLE_FLAG_RCU_IDLE bit, which enables us to call rcu_idle_enter|exit()
at the proper point.
Reported-by: Dong Aisheng <aisheng.dong@nxp.com>
Suggested-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
83 lines
2 KiB
C
83 lines
2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*/
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#include <linux/cpuidle.h>
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#include <linux/module.h>
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#include <asm/cpuidle.h>
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#include <soc/imx/cpuidle.h>
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#include "common.h"
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#include "cpuidle.h"
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#include "hardware.h"
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static int num_idle_cpus = 0;
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static DEFINE_RAW_SPINLOCK(cpuidle_lock);
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static int imx6q_enter_wait(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int index)
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{
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raw_spin_lock(&cpuidle_lock);
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if (++num_idle_cpus == num_online_cpus())
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imx6_set_lpm(WAIT_UNCLOCKED);
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raw_spin_unlock(&cpuidle_lock);
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rcu_idle_enter();
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cpu_do_idle();
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rcu_idle_exit();
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raw_spin_lock(&cpuidle_lock);
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if (num_idle_cpus-- == num_online_cpus())
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imx6_set_lpm(WAIT_CLOCKED);
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raw_spin_unlock(&cpuidle_lock);
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return index;
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}
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static struct cpuidle_driver imx6q_cpuidle_driver = {
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.name = "imx6q_cpuidle",
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.owner = THIS_MODULE,
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.states = {
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/* WFI */
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ARM_CPUIDLE_WFI_STATE,
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/* WAIT */
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{
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.exit_latency = 50,
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.target_residency = 75,
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.flags = CPUIDLE_FLAG_TIMER_STOP | CPUIDLE_FLAG_RCU_IDLE,
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.enter = imx6q_enter_wait,
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.name = "WAIT",
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.desc = "Clock off",
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},
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},
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.state_count = 2,
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.safe_state_index = 0,
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};
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/*
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* i.MX6 Q/DL has an erratum (ERR006687) that prevents the FEC from waking the
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* CPUs when they are in wait(unclocked) state. As the hardware workaround isn't
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* applicable to all boards, disable the deeper idle state when the workaround
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* isn't present and the FEC is in use.
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*/
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void imx6q_cpuidle_fec_irqs_used(void)
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{
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cpuidle_driver_state_disabled(&imx6q_cpuidle_driver, 1, true);
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}
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EXPORT_SYMBOL_GPL(imx6q_cpuidle_fec_irqs_used);
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void imx6q_cpuidle_fec_irqs_unused(void)
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{
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cpuidle_driver_state_disabled(&imx6q_cpuidle_driver, 1, false);
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}
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EXPORT_SYMBOL_GPL(imx6q_cpuidle_fec_irqs_unused);
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int __init imx6q_cpuidle_init(void)
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{
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/* Set INT_MEM_CLK_LPM bit to get a reliable WAIT mode support */
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imx6_set_int_mem_clk_lpm(true);
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return cpuidle_register(&imx6q_cpuidle_driver, NULL);
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}
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