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5f97f7f940
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000 CPU and the AT32STK1000 development board. AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption and high code density. The AVR32 architecture is not binary compatible with earlier 8-bit AVR architectures. The AVR32 architecture, including the instruction set, is described by the AVR32 Architecture Manual, available from http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It features a 7-stage pipeline, 16KB instruction and data caches and a full Memory Management Unit. It also comes with a large set of integrated peripherals, many of which are shared with the AT91 ARM-based controllers from Atmel. Full data sheet is available from http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf while the CPU core implementation including caches and MMU is documented by the AVR32 AP Technical Reference, available from http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf Information about the AT32STK1000 development board can be found at http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918 including a BSP CD image with an earlier version of this patch, development tools (binaries and source/patches) and a root filesystem image suitable for booting from SD card. Alternatively, there's a preliminary "getting started" guide available at http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links to the sources and patches you will need in order to set up a cross-compiling environment for avr32-linux. This patch, as well as the other patches included with the BSP and the toolchain patches, is actively supported by Atmel Corporation. [dmccr@us.ibm.com: Fix more pxx_page macro locations] [bunk@stusta.de: fix `make defconfig'] Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Dave McCracken <dmccr@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
270 lines
6.1 KiB
C
270 lines
6.1 KiB
C
/*
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* Kernel Probes (KProbes)
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*
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* Copyright (C) 2005-2006 Atmel Corporation
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*
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* Based on arch/ppc64/kernel/kprobes.c
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* Copyright (C) IBM Corporation, 2002, 2004
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kprobes.h>
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#include <linux/ptrace.h>
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#include <asm/cacheflush.h>
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#include <asm/kdebug.h>
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#include <asm/ocd.h>
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DEFINE_PER_CPU(struct kprobe *, current_kprobe);
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static unsigned long kprobe_status;
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static struct pt_regs jprobe_saved_regs;
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int __kprobes arch_prepare_kprobe(struct kprobe *p)
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{
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int ret = 0;
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if ((unsigned long)p->addr & 0x01) {
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printk("Attempt to register kprobe at an unaligned address\n");
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ret = -EINVAL;
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}
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/* XXX: Might be a good idea to check if p->addr is a valid
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* kernel address as well... */
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if (!ret) {
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pr_debug("copy kprobe at %p\n", p->addr);
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memcpy(p->ainsn.insn, p->addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t));
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p->opcode = *p->addr;
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}
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return ret;
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}
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void __kprobes arch_arm_kprobe(struct kprobe *p)
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{
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pr_debug("arming kprobe at %p\n", p->addr);
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*p->addr = BREAKPOINT_INSTRUCTION;
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flush_icache_range((unsigned long)p->addr,
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(unsigned long)p->addr + sizeof(kprobe_opcode_t));
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}
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void __kprobes arch_disarm_kprobe(struct kprobe *p)
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{
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pr_debug("disarming kprobe at %p\n", p->addr);
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*p->addr = p->opcode;
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flush_icache_range((unsigned long)p->addr,
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(unsigned long)p->addr + sizeof(kprobe_opcode_t));
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}
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static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
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{
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unsigned long dc;
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pr_debug("preparing to singlestep over %p (PC=%08lx)\n",
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p->addr, regs->pc);
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BUG_ON(!(sysreg_read(SR) & SYSREG_BIT(SR_D)));
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dc = __mfdr(DBGREG_DC);
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dc |= DC_SS;
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__mtdr(DBGREG_DC, dc);
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/*
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* We must run the instruction from its original location
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* since it may actually reference PC.
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*
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* TODO: Do the instruction replacement directly in icache.
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*/
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*p->addr = p->opcode;
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flush_icache_range((unsigned long)p->addr,
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(unsigned long)p->addr + sizeof(kprobe_opcode_t));
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}
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static void __kprobes resume_execution(struct kprobe *p, struct pt_regs *regs)
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{
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unsigned long dc;
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pr_debug("resuming execution at PC=%08lx\n", regs->pc);
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dc = __mfdr(DBGREG_DC);
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dc &= ~DC_SS;
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__mtdr(DBGREG_DC, dc);
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*p->addr = BREAKPOINT_INSTRUCTION;
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flush_icache_range((unsigned long)p->addr,
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(unsigned long)p->addr + sizeof(kprobe_opcode_t));
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}
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static void __kprobes set_current_kprobe(struct kprobe *p)
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{
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__get_cpu_var(current_kprobe) = p;
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}
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static int __kprobes kprobe_handler(struct pt_regs *regs)
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{
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struct kprobe *p;
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void *addr = (void *)regs->pc;
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int ret = 0;
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pr_debug("kprobe_handler: kprobe_running=%d\n",
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kprobe_running());
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/*
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* We don't want to be preempted for the entire
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* duration of kprobe processing
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*/
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preempt_disable();
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/* Check that we're not recursing */
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if (kprobe_running()) {
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p = get_kprobe(addr);
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if (p) {
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if (kprobe_status == KPROBE_HIT_SS) {
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printk("FIXME: kprobe hit while single-stepping!\n");
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goto no_kprobe;
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}
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printk("FIXME: kprobe hit while handling another kprobe\n");
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goto no_kprobe;
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} else {
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p = kprobe_running();
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if (p->break_handler && p->break_handler(p, regs))
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goto ss_probe;
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}
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/* If it's not ours, can't be delete race, (we hold lock). */
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goto no_kprobe;
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}
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p = get_kprobe(addr);
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if (!p)
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goto no_kprobe;
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kprobe_status = KPROBE_HIT_ACTIVE;
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set_current_kprobe(p);
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if (p->pre_handler && p->pre_handler(p, regs))
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/* handler has already set things up, so skip ss setup */
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return 1;
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ss_probe:
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prepare_singlestep(p, regs);
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kprobe_status = KPROBE_HIT_SS;
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return 1;
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no_kprobe:
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return ret;
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}
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static int __kprobes post_kprobe_handler(struct pt_regs *regs)
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{
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struct kprobe *cur = kprobe_running();
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pr_debug("post_kprobe_handler, cur=%p\n", cur);
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if (!cur)
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return 0;
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if (cur->post_handler) {
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kprobe_status = KPROBE_HIT_SSDONE;
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cur->post_handler(cur, regs, 0);
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}
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resume_execution(cur, regs);
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reset_current_kprobe();
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preempt_enable_no_resched();
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return 1;
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}
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static int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
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{
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struct kprobe *cur = kprobe_running();
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pr_debug("kprobe_fault_handler: trapnr=%d\n", trapnr);
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if (cur->fault_handler && cur->fault_handler(cur, regs, trapnr))
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return 1;
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if (kprobe_status & KPROBE_HIT_SS) {
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resume_execution(cur, regs);
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preempt_enable_no_resched();
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}
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return 0;
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}
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/*
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* Wrapper routine to for handling exceptions.
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*/
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int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
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unsigned long val, void *data)
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{
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struct die_args *args = (struct die_args *)data;
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int ret = NOTIFY_DONE;
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pr_debug("kprobe_exceptions_notify: val=%lu, data=%p\n",
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val, data);
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switch (val) {
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case DIE_BREAKPOINT:
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if (kprobe_handler(args->regs))
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ret = NOTIFY_STOP;
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break;
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case DIE_SSTEP:
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if (post_kprobe_handler(args->regs))
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ret = NOTIFY_STOP;
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break;
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case DIE_FAULT:
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if (kprobe_running()
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&& kprobe_fault_handler(args->regs, args->trapnr))
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ret = NOTIFY_STOP;
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break;
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default:
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break;
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}
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return ret;
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}
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int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
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{
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struct jprobe *jp = container_of(p, struct jprobe, kp);
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memcpy(&jprobe_saved_regs, regs, sizeof(struct pt_regs));
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/*
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* TODO: We should probably save some of the stack here as
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* well, since gcc may pass arguments on the stack for certain
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* functions (lots of arguments, large aggregates, varargs)
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*/
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/* setup return addr to the jprobe handler routine */
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regs->pc = (unsigned long)jp->entry;
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return 1;
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}
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void __kprobes jprobe_return(void)
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{
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asm volatile("breakpoint" ::: "memory");
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}
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int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
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{
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/*
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* FIXME - we should ideally be validating that we got here 'cos
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* of the "trap" in jprobe_return() above, before restoring the
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* saved regs...
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*/
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memcpy(regs, &jprobe_saved_regs, sizeof(struct pt_regs));
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return 1;
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}
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int __init arch_init_kprobes(void)
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{
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printk("KPROBES: Enabling monitor mode (MM|DBE)...\n");
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__mtdr(DBGREG_DC, DC_MM | DC_DBE);
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/* TODO: Register kretprobe trampoline */
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return 0;
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}
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