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![Bartlomiej Zolnierkiewicz](/assets/img/avatar_default.png)
Remove no longer needed DMA unmap flags: - DMA_COMPL_SKIP_SRC_UNMAP - DMA_COMPL_SKIP_DEST_UNMAP - DMA_COMPL_SRC_UNMAP_SINGLE - DMA_COMPL_DEST_UNMAP_SINGLE Cc: Vinod Koul <vinod.koul@intel.com> Cc: Tomasz Figa <t.figa@samsung.com> Cc: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Jon Mason <jon.mason@intel.com> Acked-by: Mark Brown <broonie@linaro.org> [djbw: clean up straggling skip unmap flags in ntb] Signed-off-by: Dan Williams <dan.j.williams@intel.com>
346 lines
9.8 KiB
C
346 lines
9.8 KiB
C
/*
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* xor offload engine api
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*
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* Copyright © 2006, Intel Corporation.
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*
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* Dan Williams <dan.j.williams@intel.com>
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*
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* with architecture considerations by:
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* Neil Brown <neilb@suse.de>
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* Jeff Garzik <jeff@garzik.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/dma-mapping.h>
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#include <linux/raid/xor.h>
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#include <linux/async_tx.h>
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/* do_async_xor - dma map the pages and perform the xor with an engine */
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static __async_inline struct dma_async_tx_descriptor *
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do_async_xor(struct dma_chan *chan, struct dmaengine_unmap_data *unmap,
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struct async_submit_ctl *submit)
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{
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struct dma_device *dma = chan->device;
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struct dma_async_tx_descriptor *tx = NULL;
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dma_async_tx_callback cb_fn_orig = submit->cb_fn;
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void *cb_param_orig = submit->cb_param;
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enum async_tx_flags flags_orig = submit->flags;
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enum dma_ctrl_flags dma_flags = 0;
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int src_cnt = unmap->to_cnt;
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int xor_src_cnt;
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dma_addr_t dma_dest = unmap->addr[unmap->to_cnt];
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dma_addr_t *src_list = unmap->addr;
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while (src_cnt) {
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dma_addr_t tmp;
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submit->flags = flags_orig;
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xor_src_cnt = min(src_cnt, (int)dma->max_xor);
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/* if we are submitting additional xors, leave the chain open
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* and clear the callback parameters
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*/
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if (src_cnt > xor_src_cnt) {
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submit->flags &= ~ASYNC_TX_ACK;
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submit->flags |= ASYNC_TX_FENCE;
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submit->cb_fn = NULL;
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submit->cb_param = NULL;
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} else {
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submit->cb_fn = cb_fn_orig;
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submit->cb_param = cb_param_orig;
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}
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if (submit->cb_fn)
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dma_flags |= DMA_PREP_INTERRUPT;
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if (submit->flags & ASYNC_TX_FENCE)
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dma_flags |= DMA_PREP_FENCE;
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/* Drivers force forward progress in case they can not provide a
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* descriptor
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*/
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tmp = src_list[0];
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if (src_list > unmap->addr)
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src_list[0] = dma_dest;
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tx = dma->device_prep_dma_xor(chan, dma_dest, src_list,
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xor_src_cnt, unmap->len,
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dma_flags);
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src_list[0] = tmp;
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if (unlikely(!tx))
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async_tx_quiesce(&submit->depend_tx);
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/* spin wait for the preceding transactions to complete */
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while (unlikely(!tx)) {
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dma_async_issue_pending(chan);
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tx = dma->device_prep_dma_xor(chan, dma_dest,
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src_list,
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xor_src_cnt, unmap->len,
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dma_flags);
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}
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dma_set_unmap(tx, unmap);
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async_tx_submit(chan, tx, submit);
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submit->depend_tx = tx;
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if (src_cnt > xor_src_cnt) {
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/* drop completed sources */
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src_cnt -= xor_src_cnt;
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/* use the intermediate result a source */
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src_cnt++;
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src_list += xor_src_cnt - 1;
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} else
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break;
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}
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return tx;
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}
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static void
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do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset,
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int src_cnt, size_t len, struct async_submit_ctl *submit)
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{
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int i;
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int xor_src_cnt = 0;
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int src_off = 0;
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void *dest_buf;
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void **srcs;
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if (submit->scribble)
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srcs = submit->scribble;
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else
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srcs = (void **) src_list;
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/* convert to buffer pointers */
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for (i = 0; i < src_cnt; i++)
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if (src_list[i])
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srcs[xor_src_cnt++] = page_address(src_list[i]) + offset;
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src_cnt = xor_src_cnt;
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/* set destination address */
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dest_buf = page_address(dest) + offset;
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if (submit->flags & ASYNC_TX_XOR_ZERO_DST)
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memset(dest_buf, 0, len);
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while (src_cnt > 0) {
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/* process up to 'MAX_XOR_BLOCKS' sources */
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xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS);
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xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]);
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/* drop completed sources */
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src_cnt -= xor_src_cnt;
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src_off += xor_src_cnt;
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}
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async_tx_sync_epilog(submit);
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}
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/**
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* async_xor - attempt to xor a set of blocks with a dma engine.
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* @dest: destination page
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* @src_list: array of source pages
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* @offset: common src/dst offset to start transaction
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* @src_cnt: number of source pages
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* @len: length in bytes
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* @submit: submission / completion modifiers
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*
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* honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST
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*
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* xor_blocks always uses the dest as a source so the
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* ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in
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* the calculation. The assumption with dma eninges is that they only
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* use the destination buffer as a source when it is explicity specified
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* in the source list.
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*
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* src_list note: if the dest is also a source it must be at index zero.
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* The contents of this array will be overwritten if a scribble region
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* is not specified.
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*/
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struct dma_async_tx_descriptor *
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async_xor(struct page *dest, struct page **src_list, unsigned int offset,
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int src_cnt, size_t len, struct async_submit_ctl *submit)
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{
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struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR,
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&dest, 1, src_list,
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src_cnt, len);
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struct dma_device *device = chan ? chan->device : NULL;
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struct dmaengine_unmap_data *unmap = NULL;
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BUG_ON(src_cnt <= 1);
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if (device)
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unmap = dmaengine_get_unmap_data(device->dev, src_cnt+1, GFP_NOIO);
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if (unmap && is_dma_xor_aligned(device, offset, 0, len)) {
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struct dma_async_tx_descriptor *tx;
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int i, j;
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/* run the xor asynchronously */
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pr_debug("%s (async): len: %zu\n", __func__, len);
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unmap->len = len;
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for (i = 0, j = 0; i < src_cnt; i++) {
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if (!src_list[i])
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continue;
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unmap->to_cnt++;
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unmap->addr[j++] = dma_map_page(device->dev, src_list[i],
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offset, len, DMA_TO_DEVICE);
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}
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/* map it bidirectional as it may be re-used as a source */
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unmap->addr[j] = dma_map_page(device->dev, dest, offset, len,
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DMA_BIDIRECTIONAL);
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unmap->bidi_cnt = 1;
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tx = do_async_xor(chan, unmap, submit);
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dmaengine_unmap_put(unmap);
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return tx;
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} else {
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dmaengine_unmap_put(unmap);
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/* run the xor synchronously */
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pr_debug("%s (sync): len: %zu\n", __func__, len);
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WARN_ONCE(chan, "%s: no space for dma address conversion\n",
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__func__);
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/* in the sync case the dest is an implied source
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* (assumes the dest is the first source)
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*/
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if (submit->flags & ASYNC_TX_XOR_DROP_DST) {
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src_cnt--;
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src_list++;
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}
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/* wait for any prerequisite operations */
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async_tx_quiesce(&submit->depend_tx);
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do_sync_xor(dest, src_list, offset, src_cnt, len, submit);
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return NULL;
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}
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}
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EXPORT_SYMBOL_GPL(async_xor);
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static int page_is_zero(struct page *p, unsigned int offset, size_t len)
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{
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return !memchr_inv(page_address(p) + offset, 0, len);
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}
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static inline struct dma_chan *
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xor_val_chan(struct async_submit_ctl *submit, struct page *dest,
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struct page **src_list, int src_cnt, size_t len)
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{
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#ifdef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
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return NULL;
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#endif
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return async_tx_find_channel(submit, DMA_XOR_VAL, &dest, 1, src_list,
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src_cnt, len);
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}
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/**
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* async_xor_val - attempt a xor parity check with a dma engine.
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* @dest: destination page used if the xor is performed synchronously
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* @src_list: array of source pages
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* @offset: offset in pages to start transaction
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* @src_cnt: number of source pages
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* @len: length in bytes
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* @result: 0 if sum == 0 else non-zero
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* @submit: submission / completion modifiers
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*
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* honored flags: ASYNC_TX_ACK
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*
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* src_list note: if the dest is also a source it must be at index zero.
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* The contents of this array will be overwritten if a scribble region
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* is not specified.
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*/
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struct dma_async_tx_descriptor *
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async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
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int src_cnt, size_t len, enum sum_check_flags *result,
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struct async_submit_ctl *submit)
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{
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struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len);
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struct dma_device *device = chan ? chan->device : NULL;
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struct dma_async_tx_descriptor *tx = NULL;
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struct dmaengine_unmap_data *unmap = NULL;
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BUG_ON(src_cnt <= 1);
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if (device)
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unmap = dmaengine_get_unmap_data(device->dev, src_cnt, GFP_NOIO);
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if (unmap && src_cnt <= device->max_xor &&
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is_dma_xor_aligned(device, offset, 0, len)) {
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unsigned long dma_prep_flags = 0;
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int i;
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pr_debug("%s: (async) len: %zu\n", __func__, len);
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if (submit->cb_fn)
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dma_prep_flags |= DMA_PREP_INTERRUPT;
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if (submit->flags & ASYNC_TX_FENCE)
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dma_prep_flags |= DMA_PREP_FENCE;
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for (i = 0; i < src_cnt; i++) {
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unmap->addr[i] = dma_map_page(device->dev, src_list[i],
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offset, len, DMA_TO_DEVICE);
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unmap->to_cnt++;
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}
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unmap->len = len;
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tx = device->device_prep_dma_xor_val(chan, unmap->addr, src_cnt,
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len, result,
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dma_prep_flags);
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if (unlikely(!tx)) {
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async_tx_quiesce(&submit->depend_tx);
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while (!tx) {
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dma_async_issue_pending(chan);
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tx = device->device_prep_dma_xor_val(chan,
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unmap->addr, src_cnt, len, result,
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dma_prep_flags);
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}
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}
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dma_set_unmap(tx, unmap);
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async_tx_submit(chan, tx, submit);
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} else {
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enum async_tx_flags flags_orig = submit->flags;
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pr_debug("%s: (sync) len: %zu\n", __func__, len);
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WARN_ONCE(device && src_cnt <= device->max_xor,
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"%s: no space for dma address conversion\n",
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__func__);
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submit->flags |= ASYNC_TX_XOR_DROP_DST;
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submit->flags &= ~ASYNC_TX_ACK;
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tx = async_xor(dest, src_list, offset, src_cnt, len, submit);
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async_tx_quiesce(&tx);
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*result = !page_is_zero(dest, offset, len) << SUM_CHECK_P;
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async_tx_sync_epilog(submit);
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submit->flags = flags_orig;
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}
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dmaengine_unmap_put(unmap);
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return tx;
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}
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EXPORT_SYMBOL_GPL(async_xor_val);
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MODULE_AUTHOR("Intel Corporation");
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MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api");
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MODULE_LICENSE("GPL");
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