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![Robin Murphy](/assets/img/avatar_default.png)
[ Upstream commit e338cb6bef
]
If we're aborting after failing to register the PMU device,
we probably don't want to leak the IRQs that we've claimed.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/53031a607fc8412a60024bfb3bb8cd7141f998f5.1616774562.git.robin.murphy@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
249 lines
5.5 KiB
C
249 lines
5.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* platform_device probing code for ARM performance counters.
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*
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* Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles
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* Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com>
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*/
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#define pr_fmt(fmt) "hw perfevents: " fmt
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#include <linux/bug.h>
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#include <linux/cpumask.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/irq.h>
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#include <linux/irqdesc.h>
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#include <linux/kconfig.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/percpu.h>
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#include <linux/perf/arm_pmu.h>
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#include <linux/platform_device.h>
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#include <linux/printk.h>
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#include <linux/smp.h>
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static int probe_current_pmu(struct arm_pmu *pmu,
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const struct pmu_probe_info *info)
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{
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int cpu = get_cpu();
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unsigned int cpuid = read_cpuid_id();
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int ret = -ENODEV;
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pr_info("probing PMU on CPU %d\n", cpu);
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for (; info->init != NULL; info++) {
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if ((cpuid & info->mask) != info->cpuid)
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continue;
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ret = info->init(pmu);
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break;
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}
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put_cpu();
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return ret;
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}
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static int pmu_parse_percpu_irq(struct arm_pmu *pmu, int irq)
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{
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int cpu, ret;
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struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
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ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus);
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if (ret)
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return ret;
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for_each_cpu(cpu, &pmu->supported_cpus)
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per_cpu(hw_events->irq, cpu) = irq;
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return 0;
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}
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static bool pmu_has_irq_affinity(struct device_node *node)
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{
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return !!of_find_property(node, "interrupt-affinity", NULL);
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}
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static int pmu_parse_irq_affinity(struct device_node *node, int i)
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{
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struct device_node *dn;
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int cpu;
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/*
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* If we don't have an interrupt-affinity property, we guess irq
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* affinity matches our logical CPU order, as we used to assume.
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* This is fragile, so we'll warn in pmu_parse_irqs().
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*/
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if (!pmu_has_irq_affinity(node))
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return i;
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dn = of_parse_phandle(node, "interrupt-affinity", i);
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if (!dn) {
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pr_warn("failed to parse interrupt-affinity[%d] for %pOFn\n",
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i, node);
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return -EINVAL;
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}
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cpu = of_cpu_node_to_id(dn);
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if (cpu < 0) {
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pr_warn("failed to find logical CPU for %pOFn\n", dn);
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cpu = nr_cpu_ids;
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}
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of_node_put(dn);
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return cpu;
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}
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static int pmu_parse_irqs(struct arm_pmu *pmu)
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{
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int i = 0, num_irqs;
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struct platform_device *pdev = pmu->plat_device;
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struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
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num_irqs = platform_irq_count(pdev);
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if (num_irqs < 0) {
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pr_err("unable to count PMU IRQs\n");
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return num_irqs;
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}
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/*
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* In this case we have no idea which CPUs are covered by the PMU.
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* To match our prior behaviour, we assume all CPUs in this case.
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*/
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if (num_irqs == 0) {
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pr_warn("no irqs for PMU, sampling events not supported\n");
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pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
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cpumask_setall(&pmu->supported_cpus);
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return 0;
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}
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if (num_irqs == 1) {
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int irq = platform_get_irq(pdev, 0);
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if (irq && irq_is_percpu_devid(irq))
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return pmu_parse_percpu_irq(pmu, irq);
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}
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if (nr_cpu_ids != 1 && !pmu_has_irq_affinity(pdev->dev.of_node)) {
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pr_warn("no interrupt-affinity property for %pOF, guessing.\n",
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pdev->dev.of_node);
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}
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for (i = 0; i < num_irqs; i++) {
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int cpu, irq;
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irq = platform_get_irq(pdev, i);
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if (WARN_ON(irq <= 0))
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continue;
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if (irq_is_percpu_devid(irq)) {
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pr_warn("multiple PPIs or mismatched SPI/PPI detected\n");
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return -EINVAL;
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}
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cpu = pmu_parse_irq_affinity(pdev->dev.of_node, i);
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if (cpu < 0)
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return cpu;
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if (cpu >= nr_cpu_ids)
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continue;
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if (per_cpu(hw_events->irq, cpu)) {
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pr_warn("multiple PMU IRQs for the same CPU detected\n");
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return -EINVAL;
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}
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per_cpu(hw_events->irq, cpu) = irq;
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cpumask_set_cpu(cpu, &pmu->supported_cpus);
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}
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return 0;
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}
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static int armpmu_request_irqs(struct arm_pmu *armpmu)
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{
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struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;
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int cpu, err = 0;
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for_each_cpu(cpu, &armpmu->supported_cpus) {
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int irq = per_cpu(hw_events->irq, cpu);
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if (!irq)
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continue;
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err = armpmu_request_irq(irq, cpu);
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if (err)
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break;
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}
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return err;
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}
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static void armpmu_free_irqs(struct arm_pmu *armpmu)
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{
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int cpu;
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struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;
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for_each_cpu(cpu, &armpmu->supported_cpus) {
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int irq = per_cpu(hw_events->irq, cpu);
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armpmu_free_irq(irq, cpu);
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}
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}
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int arm_pmu_device_probe(struct platform_device *pdev,
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const struct of_device_id *of_table,
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const struct pmu_probe_info *probe_table)
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{
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const struct of_device_id *of_id;
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armpmu_init_fn init_fn;
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struct device_node *node = pdev->dev.of_node;
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struct arm_pmu *pmu;
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int ret = -ENODEV;
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pmu = armpmu_alloc();
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if (!pmu)
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return -ENOMEM;
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pmu->plat_device = pdev;
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ret = pmu_parse_irqs(pmu);
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if (ret)
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goto out_free;
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if (node && (of_id = of_match_node(of_table, pdev->dev.of_node))) {
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init_fn = of_id->data;
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pmu->secure_access = of_property_read_bool(pdev->dev.of_node,
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"secure-reg-access");
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/* arm64 systems boot only as non-secure */
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if (IS_ENABLED(CONFIG_ARM64) && pmu->secure_access) {
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pr_warn("ignoring \"secure-reg-access\" property for arm64\n");
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pmu->secure_access = false;
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}
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ret = init_fn(pmu);
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} else if (probe_table) {
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cpumask_setall(&pmu->supported_cpus);
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ret = probe_current_pmu(pmu, probe_table);
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}
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if (ret) {
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pr_info("%pOF: failed to probe PMU!\n", node);
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goto out_free;
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}
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ret = armpmu_request_irqs(pmu);
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if (ret)
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goto out_free_irqs;
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ret = armpmu_register(pmu);
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if (ret)
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goto out_free_irqs;
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return 0;
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out_free_irqs:
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armpmu_free_irqs(pmu);
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out_free:
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pr_info("%pOF: failed to register PMU devices!\n", node);
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armpmu_free(pmu);
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return ret;
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}
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