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6a0e321ea7
In order to add meta-schema checks for additional/unevaluatedProperties being present, all schema need to make this explicit. As common/shared schema are included by other schemas, they should always allow for additionalProperties. Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Sebastian Reichel <sre@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20201005183830.486085-5-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
133 lines
4.7 KiB
YAML
133 lines
4.7 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/pinmux-node.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Generic pin multiplexing node schema
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maintainers:
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- Linus Walleij <linus.walleij@linaro.org>
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description: |
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The contents of the pin configuration child nodes are defined by the binding
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for the individual pin controller device. The pin configuration nodes need not
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be direct children of the pin controller device; they may be grandchildren,
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for example. Whether this is legal, and whether there is any interaction
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between the child and intermediate parent nodes, is again defined entirely by
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the binding for the individual pin controller device.
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While not required to be used, there are 3 generic forms of pin muxing nodes
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which pin controller devices can use.
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pin multiplexing nodes:
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Example:
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state_0_node_a {
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uart0 {
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function = "uart0";
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groups = "u0rxtx", "u0rtscts";
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};
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};
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state_1_node_a {
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spi0 {
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function = "spi0";
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groups = "spi0pins";
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};
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};
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state_2_node_a {
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function = "i2c0";
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pins = "mfio29", "mfio30";
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};
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Optionally an alternative binding can be used if more suitable depending on the
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pin controller hardware. For hardware where there is a large number of identical
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pin controller instances, naming each pin and function can easily become
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unmaintainable. This is especially the case if the same controller is used for
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different pins and functions depending on the SoC revision and packaging.
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For cases like this, the pin controller driver may use pinctrl-pin-array helper
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binding with a hardware based index and a number of pin configuration values:
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pincontroller {
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... /* Standard DT properties for the device itself elided */
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#pinctrl-cells = <2>;
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state_0_node_a {
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pinctrl-pin-array = <
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0 A_DELAY_PS(0) G_DELAY_PS(120)
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4 A_DELAY_PS(0) G_DELAY_PS(360)
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...
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>;
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};
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...
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};
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Above #pinctrl-cells specifies the number of value cells in addition to the
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index of the registers. This is similar to the interrupts-extended binding with
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one exception. There is no need to specify the phandle for each entry as that
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is already known as the defined pins are always children of the pin controller
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node. Further having the phandle pointing to another pin controller would not
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currently work as the pinctrl framework uses named modes to group pins for each
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pin control device.
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The index for pinctrl-pin-array must relate to the hardware for the pinctrl
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registers, and must not be a virtual index of pin instances. The reason for
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this is to avoid mapping of the index in the dts files and the pin controller
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driver as it can change.
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For hardware where pin multiplexing configurations have to be specified for
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each single pin the number of required sub-nodes containing "pin" and
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"function" properties can quickly escalate and become hard to write and
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maintain.
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For cases like this, the pin controller driver may use the pinmux helper
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property, where the pin identifier is provided with mux configuration settings
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in a pinmux group. A pinmux group consists of the pin identifier and mux
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settings represented as a single integer or an array of integers.
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The pinmux property accepts an array of pinmux groups, each of them describing
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a single pin multiplexing configuration.
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pincontroller {
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state_0_node_a {
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pinmux = <PINMUX_GROUP>, <PINMUX_GROUP>, ...;
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};
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};
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Each individual pin controller driver bindings documentation shall specify
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how pin IDs and pin multiplexing configuration are defined and assembled
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together in a pinmux group.
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properties:
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function:
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$ref: /schemas/types.yaml#/definitions/string
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description: The mux function to select
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pins:
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oneOf:
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- $ref: /schemas/types.yaml#/definitions/uint32-array
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- $ref: /schemas/types.yaml#/definitions/string-array
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description:
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The list of pin identifiers that properties in the node apply to. The
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specific binding for the hardware defines whether the entries are integers
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or strings, and their meaning.
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groups:
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$ref: /schemas/types.yaml#/definitions/string-array
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description:
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the group to apply the properties to, if the driver supports
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configuration of whole groups rather than individual pins (either
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this, "pins" or "pinmux" has to be specified)
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pinmux:
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description:
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The list of numeric pin ids and their mux settings that properties in the
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node apply to (either this, "pins" or "groups" have to be specified)
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$ref: /schemas/types.yaml#/definitions/uint32-array
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pinctrl-pin-array:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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additionalProperties: true
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