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bf9f0674e3
Make GPIO support optional for platforms that don't support GPIOLIB. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
266 lines
7 KiB
C
266 lines
7 KiB
C
/*
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* SuperH Pin Function Controller Support
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*
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* Copyright (c) 2008 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __SH_PFC_H
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#define __SH_PFC_H
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#include <linux/bug.h>
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#include <linux/stringify.h>
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typedef unsigned short pinmux_enum_t;
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#define SH_PFC_MARK_INVALID ((pinmux_enum_t)-1)
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enum {
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PINMUX_TYPE_NONE,
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PINMUX_TYPE_FUNCTION,
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PINMUX_TYPE_GPIO,
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PINMUX_TYPE_OUTPUT,
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PINMUX_TYPE_INPUT,
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PINMUX_TYPE_INPUT_PULLUP,
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PINMUX_TYPE_INPUT_PULLDOWN,
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PINMUX_FLAG_TYPE, /* must be last */
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};
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#define SH_PFC_PIN_CFG_INPUT (1 << 0)
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#define SH_PFC_PIN_CFG_OUTPUT (1 << 1)
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#define SH_PFC_PIN_CFG_PULL_UP (1 << 2)
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#define SH_PFC_PIN_CFG_PULL_DOWN (1 << 3)
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struct sh_pfc_pin {
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const pinmux_enum_t enum_id;
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const char *name;
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unsigned int configs;
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};
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#define SH_PFC_PIN_GROUP(n) \
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{ \
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.name = #n, \
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.pins = n##_pins, \
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.mux = n##_mux, \
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.nr_pins = ARRAY_SIZE(n##_pins), \
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}
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struct sh_pfc_pin_group {
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const char *name;
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const unsigned int *pins;
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const unsigned int *mux;
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unsigned int nr_pins;
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};
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#define SH_PFC_FUNCTION(n) \
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{ \
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.name = #n, \
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.groups = n##_groups, \
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.nr_groups = ARRAY_SIZE(n##_groups), \
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}
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struct sh_pfc_function {
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const char *name;
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const char * const *groups;
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unsigned int nr_groups;
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};
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struct pinmux_func {
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const pinmux_enum_t enum_id;
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const char *name;
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};
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#define PINMUX_GPIO(gpio, data_or_mark) \
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[gpio] = { \
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.name = __stringify(gpio), \
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.enum_id = data_or_mark, \
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}
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#define PINMUX_GPIO_FN(gpio, base, data_or_mark) \
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[gpio - (base)] = { \
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.name = __stringify(gpio), \
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.enum_id = data_or_mark, \
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}
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#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
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struct pinmux_cfg_reg {
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unsigned long reg, reg_width, field_width;
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const pinmux_enum_t *enum_ids;
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const unsigned long *var_field_width;
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};
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#define PINMUX_CFG_REG(name, r, r_width, f_width) \
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.reg = r, .reg_width = r_width, .field_width = f_width, \
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.enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)])
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#define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
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.reg = r, .reg_width = r_width, \
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.var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
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.enum_ids = (pinmux_enum_t [])
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struct pinmux_data_reg {
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unsigned long reg, reg_width;
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const pinmux_enum_t *enum_ids;
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};
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#define PINMUX_DATA_REG(name, r, r_width) \
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.reg = r, .reg_width = r_width, \
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.enum_ids = (pinmux_enum_t [r_width]) \
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struct pinmux_irq {
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int irq;
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unsigned short *gpios;
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};
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#define PINMUX_IRQ(irq_nr, ids...) \
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{ .irq = irq_nr, .gpios = (unsigned short []) { ids, 0 } } \
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struct pinmux_range {
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pinmux_enum_t begin;
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pinmux_enum_t end;
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pinmux_enum_t force;
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};
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struct sh_pfc;
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struct sh_pfc_soc_operations {
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unsigned int (*get_bias)(struct sh_pfc *pfc, unsigned int pin);
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void (*set_bias)(struct sh_pfc *pfc, unsigned int pin,
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unsigned int bias);
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};
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struct sh_pfc_soc_info {
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const char *name;
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const struct sh_pfc_soc_operations *ops;
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struct pinmux_range input;
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struct pinmux_range input_pd;
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struct pinmux_range input_pu;
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struct pinmux_range output;
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struct pinmux_range function;
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const struct sh_pfc_pin *pins;
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unsigned int nr_pins;
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const struct pinmux_range *ranges;
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unsigned int nr_ranges;
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const struct sh_pfc_pin_group *groups;
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unsigned int nr_groups;
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const struct sh_pfc_function *functions;
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unsigned int nr_functions;
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const struct pinmux_func *func_gpios;
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unsigned int nr_func_gpios;
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const struct pinmux_cfg_reg *cfg_regs;
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const struct pinmux_data_reg *data_regs;
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const pinmux_enum_t *gpio_data;
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unsigned int gpio_data_size;
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const struct pinmux_irq *gpio_irq;
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unsigned int gpio_irq_size;
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unsigned long unlock_reg;
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};
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enum { GPIO_CFG_REQ, GPIO_CFG_FREE };
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/* helper macro for port */
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#define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
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#define PORT_10(fn, pfx, sfx) \
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PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
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PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
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PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
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PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
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PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
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#define PORT_10_REV(fn, pfx, sfx) \
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PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
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PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
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PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
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PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
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PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
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#define PORT_32(fn, pfx, sfx) \
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PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
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PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
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PORT_1(fn, pfx##31, sfx)
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#define PORT_32_REV(fn, pfx, sfx) \
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PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
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PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
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PORT_10_REV(fn, pfx, sfx)
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#define PORT_90(fn, pfx, sfx) \
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PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \
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PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \
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PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \
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PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \
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PORT_10(fn, pfx##9, sfx)
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#define _PORT_ALL(pfx, sfx) pfx##_##sfx
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#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
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#define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
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#define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
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#define GPIO_FN(str) PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
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/* helper macro for pinmux_enum_t */
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#define PORT_DATA_I(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
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#define PORT_DATA_I_PD(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
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PORT##nr##_IN, PORT##nr##_IN_PD)
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#define PORT_DATA_I_PU(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
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PORT##nr##_IN, PORT##nr##_IN_PU)
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#define PORT_DATA_I_PU_PD(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
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PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
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#define PORT_DATA_O(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
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#define PORT_DATA_IO(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
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PORT##nr##_IN)
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#define PORT_DATA_IO_PD(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
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PORT##nr##_IN, PORT##nr##_IN_PD)
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#define PORT_DATA_IO_PU(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
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PORT##nr##_IN, PORT##nr##_IN_PU)
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#define PORT_DATA_IO_PU_PD(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
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PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
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/* helper macro for top 4 bits in PORTnCR */
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#define _PCRH(in, in_pd, in_pu, out) \
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0, (out), (in), 0, \
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0, 0, 0, 0, \
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0, 0, (in_pd), 0, \
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0, 0, (in_pu), 0
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#define PORTCR(nr, reg) \
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{ \
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PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
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_PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
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PORT##nr##_IN_PU, PORT##nr##_OUT), \
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PORT##nr##_FN0, PORT##nr##_FN1, \
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PORT##nr##_FN2, PORT##nr##_FN3, \
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PORT##nr##_FN4, PORT##nr##_FN5, \
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PORT##nr##_FN6, PORT##nr##_FN7 } \
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}
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#endif /* __SH_PFC_H */
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