Boris Brezillon 4d52b2acef clk: mvebu: add missing CESA gate clk ... Even if not documented in the datasheet, the Armada 370 SoC can actually gate the CESA (crypto engine) clock. Add an entry in the gating_desc table to be able to reference the CESA gateclk in the crypto node. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>		2015-06-03 15:17:07 -07:00
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bindings	clk: mvebu: add missing CESA gate clk	2015-06-03 15:17:07 -07:00
00-INDEX
booting-without-of.txt	MIPS: BMIPS: Document the firmware->kernel DTB interface	2015-04-01 17:21:38 +02:00
changesets.txt
dynamic-resolution-notes.txt
of_unittest.txt	Documentation: rename of_selftest.txt to of_unittest.txt	2015-03-25 00:50:53 -05:00
overlay-notes.txt	Documentation: devicetree: Fix double words in Doumentation/devicetree	2015-01-28 15:13:11 -07:00
todo.txt
usage-model.txt