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02fce139fd
- Fix VDSO time-related function behavior for systems where we need to fall back to syscalls, but were instead returning bogus results. - A fix to TLB exception handlers for Cavium Octeon systems where they would inadvertently clobber the $1/$at register. - A build fix for bcm63xx configurations. - Switch to using my @kernel.org email address. -----BEGIN PGP SIGNATURE----- iIwEABYIADQWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXbTEbhYccGF1bGJ1cnRv bkBrZXJuZWwub3JnAAoJED6nn6y1dQDd+HsBAJ2Zvzlm+CftfNTPbG1SihhyH3s4 edn8VuexsPJp+TjJAP9UZHPQj35tvS5MWYRg0YsNz9HYPTVclYdEsLS9KbSMCw== =YNU+ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iIwEABYIADQWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXbylbRYccGF1bGJ1cnRv bkBrZXJuZWwub3JnAAoJED6nn6y1dQDd3JkA/2zyRKMikSbQjyr3E2XRnx0HwIUa UjeQvSR0+wofAI0VAP9D3IzB0ugAsGawUSWeYHK5CXBoSrsFNasjxNBT/G1MDA== =duXm -----END PGP SIGNATURE----- Merge tag 'mips_fixes_5.4_3' into mips-next Pull in mips-fixes primarily to gain build fixes in order to allow better testing of mips-next. A few MIPS fixes: - Fix VDSO time-related function behavior for systems where we need to fall back to syscalls, but were instead returning bogus results. - A fix to TLB exception handlers for Cavium Octeon systems where they would inadvertently clobber the $1/$at register. - A build fix for bcm63xx configurations. - Switch to using my @kernel.org email address. Signed-off-by: Paul Burton <paulburton@kernel.org>
60 lines
2.3 KiB
Text
60 lines
2.3 KiB
Text
#
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# Loongson Processors' Support
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#
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cflags-$(CONFIG_CPU_LOONGSON64) += -Wa,--trap
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#
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# Some versions of binutils, not currently mainline as of 2019/02/04, support
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# an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction
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# to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a
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# description).
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#
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# We disable this in order to prevent the assembler meddling with the
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# instruction that labels refer to, ie. if we label an ll instruction:
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#
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# 1: ll v0, 0(a0)
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#
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# ...then with the assembler fix applied the label may actually point at a sync
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# instruction inserted by the assembler, and if we were using the label in an
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# exception table the table would no longer contain the address of the ll
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# instruction.
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#
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# Avoid this by explicitly disabling that assembler behaviour. If upstream
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# binutils does not merge support for the flag then we can revisit & remove
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# this later - for now it ensures vendor toolchains don't cause problems.
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#
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cflags-$(CONFIG_CPU_LOONGSON64) += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
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#
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# binutils from v2.25 on and gcc starting from v4.9.0 treat -march=loongson3a
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# as MIPS64 R2; older versions as just R1. This leaves the possibility open
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# that GCC might generate R2 code for -march=loongson3a which then is rejected
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# by GAS. The cc-option can't probe for this behaviour so -march=loongson3a
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# can't easily be used safely within the kbuild framework.
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#
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ifeq ($(call cc-ifversion, -ge, 0409, y), y)
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ifeq ($(call ld-ifversion, -ge, 225000000, y), y)
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cflags-$(CONFIG_CPU_LOONGSON64) += \
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$(call cc-option,-march=loongson3a -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64)
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else
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cflags-$(CONFIG_CPU_LOONGSON64) += \
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$(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64)
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endif
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else
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cflags-$(CONFIG_CPU_LOONGSON64) += \
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$(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64)
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endif
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# Some -march= flags enable MMI instructions, and GCC complains about that
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# support being enabled alongside -msoft-float. Thus explicitly disable MMI.
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cflags-y += $(call cc-option,-mno-loongson-mmi)
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#
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# Loongson Machines' Support
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#
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platform-$(CONFIG_MACH_LOONGSON64) += loongson64/
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cflags-$(CONFIG_MACH_LOONGSON64) += -I$(srctree)/arch/mips/include/asm/mach-loongson64 -mno-branch-likely
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load-$(CONFIG_CPU_LOONGSON64) += 0xffffffff80200000
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