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![Gerd Hoffmann](/assets/img/avatar_default.png)
Add the bits needed for opengl rendering support: query capabilities, new virtio commands, drm ioctls. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
925 lines
26 KiB
C
925 lines
26 KiB
C
/*
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* Copyright (C) 2015 Red Hat, Inc.
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* All Rights Reserved.
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*
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* Authors:
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* Dave Airlie <airlied@redhat.com>
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* Gerd Hoffmann <kraxel@redhat.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <drm/drmP.h>
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#include "virtgpu_drv.h"
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#include <linux/virtio.h>
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#include <linux/virtio_config.h>
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#include <linux/virtio_ring.h>
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#define MAX_INLINE_CMD_SIZE 96
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#define MAX_INLINE_RESP_SIZE 24
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#define VBUFFER_SIZE (sizeof(struct virtio_gpu_vbuffer) \
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+ MAX_INLINE_CMD_SIZE \
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+ MAX_INLINE_RESP_SIZE)
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void virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
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uint32_t *resid)
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{
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int handle;
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idr_preload(GFP_KERNEL);
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spin_lock(&vgdev->resource_idr_lock);
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handle = idr_alloc(&vgdev->resource_idr, NULL, 1, 0, GFP_NOWAIT);
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spin_unlock(&vgdev->resource_idr_lock);
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idr_preload_end();
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*resid = handle;
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}
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void virtio_gpu_resource_id_put(struct virtio_gpu_device *vgdev, uint32_t id)
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{
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spin_lock(&vgdev->resource_idr_lock);
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idr_remove(&vgdev->resource_idr, id);
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spin_unlock(&vgdev->resource_idr_lock);
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}
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void virtio_gpu_ctrl_ack(struct virtqueue *vq)
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{
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struct drm_device *dev = vq->vdev->priv;
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struct virtio_gpu_device *vgdev = dev->dev_private;
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schedule_work(&vgdev->ctrlq.dequeue_work);
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}
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void virtio_gpu_cursor_ack(struct virtqueue *vq)
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{
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struct drm_device *dev = vq->vdev->priv;
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struct virtio_gpu_device *vgdev = dev->dev_private;
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schedule_work(&vgdev->cursorq.dequeue_work);
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}
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int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev)
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{
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struct virtio_gpu_vbuffer *vbuf;
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int i, size, count = 0;
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void *ptr;
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INIT_LIST_HEAD(&vgdev->free_vbufs);
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spin_lock_init(&vgdev->free_vbufs_lock);
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count += virtqueue_get_vring_size(vgdev->ctrlq.vq);
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count += virtqueue_get_vring_size(vgdev->cursorq.vq);
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size = count * VBUFFER_SIZE;
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DRM_INFO("virtio vbuffers: %d bufs, %zdB each, %dkB total.\n",
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count, VBUFFER_SIZE, size / 1024);
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vgdev->vbufs = kzalloc(size, GFP_KERNEL);
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if (!vgdev->vbufs)
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return -ENOMEM;
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for (i = 0, ptr = vgdev->vbufs;
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i < count;
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i++, ptr += VBUFFER_SIZE) {
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vbuf = ptr;
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list_add(&vbuf->list, &vgdev->free_vbufs);
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}
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return 0;
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}
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void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev)
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{
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struct virtio_gpu_vbuffer *vbuf;
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int i, count = 0;
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count += virtqueue_get_vring_size(vgdev->ctrlq.vq);
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count += virtqueue_get_vring_size(vgdev->cursorq.vq);
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spin_lock(&vgdev->free_vbufs_lock);
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for (i = 0; i < count; i++) {
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if (WARN_ON(list_empty(&vgdev->free_vbufs)))
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return;
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vbuf = list_first_entry(&vgdev->free_vbufs,
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struct virtio_gpu_vbuffer, list);
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list_del(&vbuf->list);
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}
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spin_unlock(&vgdev->free_vbufs_lock);
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kfree(vgdev->vbufs);
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}
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static struct virtio_gpu_vbuffer*
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virtio_gpu_get_vbuf(struct virtio_gpu_device *vgdev,
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int size, int resp_size, void *resp_buf,
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virtio_gpu_resp_cb resp_cb)
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{
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struct virtio_gpu_vbuffer *vbuf;
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spin_lock(&vgdev->free_vbufs_lock);
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BUG_ON(list_empty(&vgdev->free_vbufs));
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vbuf = list_first_entry(&vgdev->free_vbufs,
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struct virtio_gpu_vbuffer, list);
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list_del(&vbuf->list);
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spin_unlock(&vgdev->free_vbufs_lock);
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memset(vbuf, 0, VBUFFER_SIZE);
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BUG_ON(size > MAX_INLINE_CMD_SIZE);
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vbuf->buf = (void *)vbuf + sizeof(*vbuf);
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vbuf->size = size;
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vbuf->resp_cb = resp_cb;
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vbuf->resp_size = resp_size;
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if (resp_size <= MAX_INLINE_RESP_SIZE)
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vbuf->resp_buf = (void *)vbuf->buf + size;
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else
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vbuf->resp_buf = resp_buf;
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BUG_ON(!vbuf->resp_buf);
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return vbuf;
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}
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static void *virtio_gpu_alloc_cmd(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_vbuffer **vbuffer_p,
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int size)
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{
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struct virtio_gpu_vbuffer *vbuf;
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vbuf = virtio_gpu_get_vbuf(vgdev, size,
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sizeof(struct virtio_gpu_ctrl_hdr),
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NULL, NULL);
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if (IS_ERR(vbuf)) {
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*vbuffer_p = NULL;
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return ERR_CAST(vbuf);
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}
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*vbuffer_p = vbuf;
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return vbuf->buf;
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}
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static struct virtio_gpu_update_cursor*
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virtio_gpu_alloc_cursor(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_vbuffer **vbuffer_p)
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{
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struct virtio_gpu_vbuffer *vbuf;
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vbuf = virtio_gpu_get_vbuf
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(vgdev, sizeof(struct virtio_gpu_update_cursor),
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0, NULL, NULL);
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if (IS_ERR(vbuf)) {
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*vbuffer_p = NULL;
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return ERR_CAST(vbuf);
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}
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*vbuffer_p = vbuf;
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return (struct virtio_gpu_update_cursor *)vbuf->buf;
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}
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static void *virtio_gpu_alloc_cmd_resp(struct virtio_gpu_device *vgdev,
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virtio_gpu_resp_cb cb,
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struct virtio_gpu_vbuffer **vbuffer_p,
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int cmd_size, int resp_size,
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void *resp_buf)
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{
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struct virtio_gpu_vbuffer *vbuf;
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vbuf = virtio_gpu_get_vbuf(vgdev, cmd_size,
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resp_size, resp_buf, cb);
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if (IS_ERR(vbuf)) {
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*vbuffer_p = NULL;
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return ERR_CAST(vbuf);
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}
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*vbuffer_p = vbuf;
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return (struct virtio_gpu_command *)vbuf->buf;
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}
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static void free_vbuf(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_vbuffer *vbuf)
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{
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if (vbuf->resp_size > MAX_INLINE_RESP_SIZE)
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kfree(vbuf->resp_buf);
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kfree(vbuf->data_buf);
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spin_lock(&vgdev->free_vbufs_lock);
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list_add(&vbuf->list, &vgdev->free_vbufs);
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spin_unlock(&vgdev->free_vbufs_lock);
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}
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static void reclaim_vbufs(struct virtqueue *vq, struct list_head *reclaim_list)
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{
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struct virtio_gpu_vbuffer *vbuf;
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unsigned int len;
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int freed = 0;
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while ((vbuf = virtqueue_get_buf(vq, &len))) {
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list_add_tail(&vbuf->list, reclaim_list);
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freed++;
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}
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if (freed == 0)
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DRM_DEBUG("Huh? zero vbufs reclaimed");
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}
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void virtio_gpu_dequeue_ctrl_func(struct work_struct *work)
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{
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struct virtio_gpu_device *vgdev =
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container_of(work, struct virtio_gpu_device,
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ctrlq.dequeue_work);
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struct list_head reclaim_list;
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struct virtio_gpu_vbuffer *entry, *tmp;
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struct virtio_gpu_ctrl_hdr *resp;
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u64 fence_id = 0;
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INIT_LIST_HEAD(&reclaim_list);
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spin_lock(&vgdev->ctrlq.qlock);
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do {
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virtqueue_disable_cb(vgdev->ctrlq.vq);
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reclaim_vbufs(vgdev->ctrlq.vq, &reclaim_list);
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} while (!virtqueue_enable_cb(vgdev->ctrlq.vq));
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spin_unlock(&vgdev->ctrlq.qlock);
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list_for_each_entry_safe(entry, tmp, &reclaim_list, list) {
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resp = (struct virtio_gpu_ctrl_hdr *)entry->resp_buf;
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if (resp->type != cpu_to_le32(VIRTIO_GPU_RESP_OK_NODATA))
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DRM_DEBUG("response 0x%x\n", le32_to_cpu(resp->type));
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if (resp->flags & cpu_to_le32(VIRTIO_GPU_FLAG_FENCE)) {
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u64 f = le64_to_cpu(resp->fence_id);
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if (fence_id > f) {
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DRM_ERROR("%s: Oops: fence %llx -> %llx\n",
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__func__, fence_id, f);
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} else {
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fence_id = f;
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}
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}
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if (entry->resp_cb)
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entry->resp_cb(vgdev, entry);
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list_del(&entry->list);
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free_vbuf(vgdev, entry);
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}
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wake_up(&vgdev->ctrlq.ack_queue);
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if (fence_id)
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virtio_gpu_fence_event_process(vgdev, fence_id);
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}
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void virtio_gpu_dequeue_cursor_func(struct work_struct *work)
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{
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struct virtio_gpu_device *vgdev =
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container_of(work, struct virtio_gpu_device,
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cursorq.dequeue_work);
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struct list_head reclaim_list;
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struct virtio_gpu_vbuffer *entry, *tmp;
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INIT_LIST_HEAD(&reclaim_list);
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spin_lock(&vgdev->cursorq.qlock);
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do {
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virtqueue_disable_cb(vgdev->cursorq.vq);
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reclaim_vbufs(vgdev->cursorq.vq, &reclaim_list);
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} while (!virtqueue_enable_cb(vgdev->cursorq.vq));
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spin_unlock(&vgdev->cursorq.qlock);
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list_for_each_entry_safe(entry, tmp, &reclaim_list, list) {
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list_del(&entry->list);
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free_vbuf(vgdev, entry);
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}
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wake_up(&vgdev->cursorq.ack_queue);
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}
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static int virtio_gpu_queue_ctrl_buffer_locked(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_vbuffer *vbuf)
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{
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struct virtqueue *vq = vgdev->ctrlq.vq;
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struct scatterlist *sgs[3], vcmd, vout, vresp;
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int outcnt = 0, incnt = 0;
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int ret;
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if (!vgdev->vqs_ready)
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return -ENODEV;
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sg_init_one(&vcmd, vbuf->buf, vbuf->size);
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sgs[outcnt+incnt] = &vcmd;
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outcnt++;
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if (vbuf->data_size) {
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sg_init_one(&vout, vbuf->data_buf, vbuf->data_size);
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sgs[outcnt + incnt] = &vout;
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outcnt++;
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}
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if (vbuf->resp_size) {
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sg_init_one(&vresp, vbuf->resp_buf, vbuf->resp_size);
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sgs[outcnt + incnt] = &vresp;
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incnt++;
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}
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retry:
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ret = virtqueue_add_sgs(vq, sgs, outcnt, incnt, vbuf, GFP_ATOMIC);
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if (ret == -ENOSPC) {
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spin_unlock(&vgdev->ctrlq.qlock);
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wait_event(vgdev->ctrlq.ack_queue, vq->num_free);
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spin_lock(&vgdev->ctrlq.qlock);
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goto retry;
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} else {
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virtqueue_kick(vq);
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}
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if (!ret)
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ret = vq->num_free;
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return ret;
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}
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static int virtio_gpu_queue_ctrl_buffer(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_vbuffer *vbuf)
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{
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int rc;
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spin_lock(&vgdev->ctrlq.qlock);
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rc = virtio_gpu_queue_ctrl_buffer_locked(vgdev, vbuf);
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spin_unlock(&vgdev->ctrlq.qlock);
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return rc;
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}
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static int virtio_gpu_queue_fenced_ctrl_buffer(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_vbuffer *vbuf,
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struct virtio_gpu_ctrl_hdr *hdr,
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struct virtio_gpu_fence **fence)
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{
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struct virtqueue *vq = vgdev->ctrlq.vq;
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int rc;
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again:
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spin_lock(&vgdev->ctrlq.qlock);
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/*
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* Make sure we have enouth space in the virtqueue. If not
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* wait here until we have.
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*
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* Without that virtio_gpu_queue_ctrl_buffer_nolock might have
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* to wait for free space, which can result in fence ids being
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* submitted out-of-order.
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*/
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if (vq->num_free < 3) {
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spin_unlock(&vgdev->ctrlq.qlock);
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wait_event(vgdev->ctrlq.ack_queue, vq->num_free >= 3);
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goto again;
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}
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if (fence)
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virtio_gpu_fence_emit(vgdev, hdr, fence);
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rc = virtio_gpu_queue_ctrl_buffer_locked(vgdev, vbuf);
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spin_unlock(&vgdev->ctrlq.qlock);
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return rc;
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}
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static int virtio_gpu_queue_cursor(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_vbuffer *vbuf)
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{
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struct virtqueue *vq = vgdev->cursorq.vq;
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struct scatterlist *sgs[1], ccmd;
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int ret;
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int outcnt;
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if (!vgdev->vqs_ready)
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return -ENODEV;
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sg_init_one(&ccmd, vbuf->buf, vbuf->size);
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sgs[0] = &ccmd;
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outcnt = 1;
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spin_lock(&vgdev->cursorq.qlock);
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retry:
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ret = virtqueue_add_sgs(vq, sgs, outcnt, 0, vbuf, GFP_ATOMIC);
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if (ret == -ENOSPC) {
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spin_unlock(&vgdev->cursorq.qlock);
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wait_event(vgdev->cursorq.ack_queue, vq->num_free);
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spin_lock(&vgdev->cursorq.qlock);
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goto retry;
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} else {
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virtqueue_kick(vq);
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}
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spin_unlock(&vgdev->cursorq.qlock);
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if (!ret)
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ret = vq->num_free;
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return ret;
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}
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/* just create gem objects for userspace and long lived objects,
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just use dma_alloced pages for the queue objects? */
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/* create a basic resource */
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void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
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uint32_t resource_id,
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uint32_t format,
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uint32_t width,
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uint32_t height)
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{
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struct virtio_gpu_resource_create_2d *cmd_p;
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struct virtio_gpu_vbuffer *vbuf;
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cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
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memset(cmd_p, 0, sizeof(*cmd_p));
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cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_RESOURCE_CREATE_2D);
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cmd_p->resource_id = cpu_to_le32(resource_id);
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cmd_p->format = cpu_to_le32(format);
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cmd_p->width = cpu_to_le32(width);
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cmd_p->height = cpu_to_le32(height);
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virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
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}
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void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
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uint32_t resource_id)
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{
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struct virtio_gpu_resource_unref *cmd_p;
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struct virtio_gpu_vbuffer *vbuf;
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cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
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memset(cmd_p, 0, sizeof(*cmd_p));
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cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_RESOURCE_UNREF);
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cmd_p->resource_id = cpu_to_le32(resource_id);
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virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
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}
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void virtio_gpu_cmd_resource_inval_backing(struct virtio_gpu_device *vgdev,
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uint32_t resource_id)
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{
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struct virtio_gpu_resource_detach_backing *cmd_p;
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struct virtio_gpu_vbuffer *vbuf;
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cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
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memset(cmd_p, 0, sizeof(*cmd_p));
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cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING);
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cmd_p->resource_id = cpu_to_le32(resource_id);
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|
virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
|
|
}
|
|
|
|
void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
|
|
uint32_t scanout_id, uint32_t resource_id,
|
|
uint32_t width, uint32_t height,
|
|
uint32_t x, uint32_t y)
|
|
{
|
|
struct virtio_gpu_set_scanout *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_SET_SCANOUT);
|
|
cmd_p->resource_id = cpu_to_le32(resource_id);
|
|
cmd_p->scanout_id = cpu_to_le32(scanout_id);
|
|
cmd_p->r.width = cpu_to_le32(width);
|
|
cmd_p->r.height = cpu_to_le32(height);
|
|
cmd_p->r.x = cpu_to_le32(x);
|
|
cmd_p->r.y = cpu_to_le32(y);
|
|
|
|
virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
|
|
}
|
|
|
|
void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
|
|
uint32_t resource_id,
|
|
uint32_t x, uint32_t y,
|
|
uint32_t width, uint32_t height)
|
|
{
|
|
struct virtio_gpu_resource_flush *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_RESOURCE_FLUSH);
|
|
cmd_p->resource_id = cpu_to_le32(resource_id);
|
|
cmd_p->r.width = cpu_to_le32(width);
|
|
cmd_p->r.height = cpu_to_le32(height);
|
|
cmd_p->r.x = cpu_to_le32(x);
|
|
cmd_p->r.y = cpu_to_le32(y);
|
|
|
|
virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
|
|
}
|
|
|
|
void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
|
|
uint32_t resource_id, uint64_t offset,
|
|
__le32 width, __le32 height,
|
|
__le32 x, __le32 y,
|
|
struct virtio_gpu_fence **fence)
|
|
{
|
|
struct virtio_gpu_transfer_to_host_2d *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D);
|
|
cmd_p->resource_id = cpu_to_le32(resource_id);
|
|
cmd_p->offset = cpu_to_le64(offset);
|
|
cmd_p->r.width = width;
|
|
cmd_p->r.height = height;
|
|
cmd_p->r.x = x;
|
|
cmd_p->r.y = y;
|
|
|
|
virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, &cmd_p->hdr, fence);
|
|
}
|
|
|
|
static void
|
|
virtio_gpu_cmd_resource_attach_backing(struct virtio_gpu_device *vgdev,
|
|
uint32_t resource_id,
|
|
struct virtio_gpu_mem_entry *ents,
|
|
uint32_t nents,
|
|
struct virtio_gpu_fence **fence)
|
|
{
|
|
struct virtio_gpu_resource_attach_backing *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING);
|
|
cmd_p->resource_id = cpu_to_le32(resource_id);
|
|
cmd_p->nr_entries = cpu_to_le32(nents);
|
|
|
|
vbuf->data_buf = ents;
|
|
vbuf->data_size = sizeof(*ents) * nents;
|
|
|
|
virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, &cmd_p->hdr, fence);
|
|
}
|
|
|
|
static void virtio_gpu_cmd_get_display_info_cb(struct virtio_gpu_device *vgdev,
|
|
struct virtio_gpu_vbuffer *vbuf)
|
|
{
|
|
struct virtio_gpu_resp_display_info *resp =
|
|
(struct virtio_gpu_resp_display_info *)vbuf->resp_buf;
|
|
int i;
|
|
|
|
spin_lock(&vgdev->display_info_lock);
|
|
for (i = 0; i < vgdev->num_scanouts; i++) {
|
|
vgdev->outputs[i].info = resp->pmodes[i];
|
|
if (resp->pmodes[i].enabled) {
|
|
DRM_DEBUG("output %d: %dx%d+%d+%d", i,
|
|
le32_to_cpu(resp->pmodes[i].r.width),
|
|
le32_to_cpu(resp->pmodes[i].r.height),
|
|
le32_to_cpu(resp->pmodes[i].r.x),
|
|
le32_to_cpu(resp->pmodes[i].r.y));
|
|
} else {
|
|
DRM_DEBUG("output %d: disabled", i);
|
|
}
|
|
}
|
|
|
|
vgdev->display_info_pending = false;
|
|
spin_unlock(&vgdev->display_info_lock);
|
|
wake_up(&vgdev->resp_wq);
|
|
|
|
if (!drm_helper_hpd_irq_event(vgdev->ddev))
|
|
drm_kms_helper_hotplug_event(vgdev->ddev);
|
|
}
|
|
|
|
static void virtio_gpu_cmd_get_capset_info_cb(struct virtio_gpu_device *vgdev,
|
|
struct virtio_gpu_vbuffer *vbuf)
|
|
{
|
|
struct virtio_gpu_get_capset_info *cmd =
|
|
(struct virtio_gpu_get_capset_info *)vbuf->buf;
|
|
struct virtio_gpu_resp_capset_info *resp =
|
|
(struct virtio_gpu_resp_capset_info *)vbuf->resp_buf;
|
|
int i = le32_to_cpu(cmd->capset_index);
|
|
|
|
spin_lock(&vgdev->display_info_lock);
|
|
vgdev->capsets[i].id = le32_to_cpu(resp->capset_id);
|
|
vgdev->capsets[i].max_version = le32_to_cpu(resp->capset_max_version);
|
|
vgdev->capsets[i].max_size = le32_to_cpu(resp->capset_max_size);
|
|
spin_unlock(&vgdev->display_info_lock);
|
|
wake_up(&vgdev->resp_wq);
|
|
}
|
|
|
|
static void virtio_gpu_cmd_capset_cb(struct virtio_gpu_device *vgdev,
|
|
struct virtio_gpu_vbuffer *vbuf)
|
|
{
|
|
struct virtio_gpu_get_capset *cmd =
|
|
(struct virtio_gpu_get_capset *)vbuf->buf;
|
|
struct virtio_gpu_resp_capset *resp =
|
|
(struct virtio_gpu_resp_capset *)vbuf->resp_buf;
|
|
struct virtio_gpu_drv_cap_cache *cache_ent;
|
|
|
|
spin_lock(&vgdev->display_info_lock);
|
|
list_for_each_entry(cache_ent, &vgdev->cap_cache, head) {
|
|
if (cache_ent->version == le32_to_cpu(cmd->capset_version) &&
|
|
cache_ent->id == le32_to_cpu(cmd->capset_id)) {
|
|
memcpy(cache_ent->caps_cache, resp->capset_data,
|
|
cache_ent->size);
|
|
atomic_set(&cache_ent->is_valid, 1);
|
|
break;
|
|
}
|
|
}
|
|
spin_unlock(&vgdev->display_info_lock);
|
|
wake_up(&vgdev->resp_wq);
|
|
}
|
|
|
|
|
|
int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev)
|
|
{
|
|
struct virtio_gpu_ctrl_hdr *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
void *resp_buf;
|
|
|
|
resp_buf = kzalloc(sizeof(struct virtio_gpu_resp_display_info),
|
|
GFP_KERNEL);
|
|
if (!resp_buf)
|
|
return -ENOMEM;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd_resp
|
|
(vgdev, &virtio_gpu_cmd_get_display_info_cb, &vbuf,
|
|
sizeof(*cmd_p), sizeof(struct virtio_gpu_resp_display_info),
|
|
resp_buf);
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
vgdev->display_info_pending = true;
|
|
cmd_p->type = cpu_to_le32(VIRTIO_GPU_CMD_GET_DISPLAY_INFO);
|
|
virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
|
|
return 0;
|
|
}
|
|
|
|
int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx)
|
|
{
|
|
struct virtio_gpu_get_capset_info *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
void *resp_buf;
|
|
|
|
resp_buf = kzalloc(sizeof(struct virtio_gpu_resp_capset_info),
|
|
GFP_KERNEL);
|
|
if (!resp_buf)
|
|
return -ENOMEM;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd_resp
|
|
(vgdev, &virtio_gpu_cmd_get_capset_info_cb, &vbuf,
|
|
sizeof(*cmd_p), sizeof(struct virtio_gpu_resp_capset_info),
|
|
resp_buf);
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_GET_CAPSET_INFO);
|
|
cmd_p->capset_index = cpu_to_le32(idx);
|
|
virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
|
|
return 0;
|
|
}
|
|
|
|
int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
|
|
int idx, int version,
|
|
struct virtio_gpu_drv_cap_cache **cache_p)
|
|
{
|
|
struct virtio_gpu_get_capset *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
int max_size = vgdev->capsets[idx].max_size;
|
|
struct virtio_gpu_drv_cap_cache *cache_ent;
|
|
void *resp_buf;
|
|
|
|
if (idx > vgdev->num_capsets)
|
|
return -EINVAL;
|
|
|
|
if (version > vgdev->capsets[idx].max_version)
|
|
return -EINVAL;
|
|
|
|
cache_ent = kzalloc(sizeof(*cache_ent), GFP_KERNEL);
|
|
if (!cache_ent)
|
|
return -ENOMEM;
|
|
|
|
cache_ent->caps_cache = kmalloc(max_size, GFP_KERNEL);
|
|
if (!cache_ent->caps_cache) {
|
|
kfree(cache_ent);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
resp_buf = kzalloc(sizeof(struct virtio_gpu_resp_capset) + max_size,
|
|
GFP_KERNEL);
|
|
if (!resp_buf) {
|
|
kfree(cache_ent->caps_cache);
|
|
kfree(cache_ent);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
cache_ent->version = version;
|
|
cache_ent->id = vgdev->capsets[idx].id;
|
|
atomic_set(&cache_ent->is_valid, 0);
|
|
cache_ent->size = max_size;
|
|
spin_lock(&vgdev->display_info_lock);
|
|
list_add_tail(&cache_ent->head, &vgdev->cap_cache);
|
|
spin_unlock(&vgdev->display_info_lock);
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd_resp
|
|
(vgdev, &virtio_gpu_cmd_capset_cb, &vbuf, sizeof(*cmd_p),
|
|
sizeof(struct virtio_gpu_resp_capset) + max_size,
|
|
resp_buf);
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_GET_CAPSET);
|
|
cmd_p->capset_id = cpu_to_le32(vgdev->capsets[idx].id);
|
|
cmd_p->capset_version = cpu_to_le32(version);
|
|
*cache_p = cache_ent;
|
|
virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
|
|
uint32_t nlen, const char *name)
|
|
{
|
|
struct virtio_gpu_ctx_create *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_CTX_CREATE);
|
|
cmd_p->hdr.ctx_id = cpu_to_le32(id);
|
|
cmd_p->nlen = cpu_to_le32(nlen);
|
|
strncpy(cmd_p->debug_name, name, sizeof(cmd_p->debug_name)-1);
|
|
cmd_p->debug_name[sizeof(cmd_p->debug_name)-1] = 0;
|
|
virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
|
|
}
|
|
|
|
void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
|
|
uint32_t id)
|
|
{
|
|
struct virtio_gpu_ctx_destroy *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_CTX_DESTROY);
|
|
cmd_p->hdr.ctx_id = cpu_to_le32(id);
|
|
virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
|
|
}
|
|
|
|
void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
|
|
uint32_t ctx_id,
|
|
uint32_t resource_id)
|
|
{
|
|
struct virtio_gpu_ctx_resource *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_CTX_ATTACH_RESOURCE);
|
|
cmd_p->hdr.ctx_id = cpu_to_le32(ctx_id);
|
|
cmd_p->resource_id = cpu_to_le32(resource_id);
|
|
virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
|
|
|
|
}
|
|
|
|
void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
|
|
uint32_t ctx_id,
|
|
uint32_t resource_id)
|
|
{
|
|
struct virtio_gpu_ctx_resource *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_CTX_DETACH_RESOURCE);
|
|
cmd_p->hdr.ctx_id = cpu_to_le32(ctx_id);
|
|
cmd_p->resource_id = cpu_to_le32(resource_id);
|
|
virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
|
|
}
|
|
|
|
void
|
|
virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
|
|
struct virtio_gpu_resource_create_3d *rc_3d,
|
|
struct virtio_gpu_fence **fence)
|
|
{
|
|
struct virtio_gpu_resource_create_3d *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
*cmd_p = *rc_3d;
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_RESOURCE_CREATE_3D);
|
|
cmd_p->hdr.flags = 0;
|
|
|
|
virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, &cmd_p->hdr, fence);
|
|
}
|
|
|
|
void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
|
|
uint32_t resource_id, uint32_t ctx_id,
|
|
uint64_t offset, uint32_t level,
|
|
struct virtio_gpu_box *box,
|
|
struct virtio_gpu_fence **fence)
|
|
{
|
|
struct virtio_gpu_transfer_host_3d *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D);
|
|
cmd_p->hdr.ctx_id = cpu_to_le32(ctx_id);
|
|
cmd_p->resource_id = cpu_to_le32(resource_id);
|
|
cmd_p->box = *box;
|
|
cmd_p->offset = cpu_to_le64(offset);
|
|
cmd_p->level = cpu_to_le32(level);
|
|
|
|
virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, &cmd_p->hdr, fence);
|
|
}
|
|
|
|
void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
|
|
uint32_t resource_id, uint32_t ctx_id,
|
|
uint64_t offset, uint32_t level,
|
|
struct virtio_gpu_box *box,
|
|
struct virtio_gpu_fence **fence)
|
|
{
|
|
struct virtio_gpu_transfer_host_3d *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D);
|
|
cmd_p->hdr.ctx_id = cpu_to_le32(ctx_id);
|
|
cmd_p->resource_id = cpu_to_le32(resource_id);
|
|
cmd_p->box = *box;
|
|
cmd_p->offset = cpu_to_le64(offset);
|
|
cmd_p->level = cpu_to_le32(level);
|
|
|
|
virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, &cmd_p->hdr, fence);
|
|
}
|
|
|
|
void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
|
|
void *data, uint32_t data_size,
|
|
uint32_t ctx_id, struct virtio_gpu_fence **fence)
|
|
{
|
|
struct virtio_gpu_cmd_submit *cmd_p;
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
|
|
cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
|
|
memset(cmd_p, 0, sizeof(*cmd_p));
|
|
|
|
vbuf->data_buf = data;
|
|
vbuf->data_size = data_size;
|
|
|
|
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_SUBMIT_3D);
|
|
cmd_p->hdr.ctx_id = cpu_to_le32(ctx_id);
|
|
cmd_p->size = cpu_to_le32(data_size);
|
|
|
|
virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, &cmd_p->hdr, fence);
|
|
}
|
|
|
|
int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
|
|
struct virtio_gpu_object *obj,
|
|
uint32_t resource_id,
|
|
struct virtio_gpu_fence **fence)
|
|
{
|
|
struct virtio_gpu_mem_entry *ents;
|
|
struct scatterlist *sg;
|
|
int si;
|
|
|
|
if (!obj->pages) {
|
|
int ret;
|
|
ret = virtio_gpu_object_get_sg_table(vgdev, obj);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
/* gets freed when the ring has consumed it */
|
|
ents = kmalloc_array(obj->pages->nents,
|
|
sizeof(struct virtio_gpu_mem_entry),
|
|
GFP_KERNEL);
|
|
if (!ents) {
|
|
DRM_ERROR("failed to allocate ent list\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
for_each_sg(obj->pages->sgl, sg, obj->pages->nents, si) {
|
|
ents[si].addr = cpu_to_le64(sg_phys(sg));
|
|
ents[si].length = cpu_to_le32(sg->length);
|
|
ents[si].padding = 0;
|
|
}
|
|
|
|
virtio_gpu_cmd_resource_attach_backing(vgdev, resource_id,
|
|
ents, obj->pages->nents,
|
|
fence);
|
|
obj->hw_res_handle = resource_id;
|
|
return 0;
|
|
}
|
|
|
|
void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
|
|
struct virtio_gpu_output *output)
|
|
{
|
|
struct virtio_gpu_vbuffer *vbuf;
|
|
struct virtio_gpu_update_cursor *cur_p;
|
|
|
|
output->cursor.pos.scanout_id = cpu_to_le32(output->index);
|
|
cur_p = virtio_gpu_alloc_cursor(vgdev, &vbuf);
|
|
memcpy(cur_p, &output->cursor, sizeof(output->cursor));
|
|
virtio_gpu_queue_cursor(vgdev, vbuf);
|
|
}
|