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![Tomi Valkeinen](/assets/img/avatar_default.png)
Rework the crtc event/flip_wait system as follows: - If we enable a crtc (full modeset), we set omap_crtc->pending and register vblank irq. - If we need to set GO bit (page flip), we do the same but also set the GO bit. - On vblank we unregister the irq, clear the 'pending' flag, send vblank event to userspace if crtc->state->event != NULL, and wake up 'pending_wait' wq. - In omap_atomic_complete() we wait for the 'pending' flag to get reset for all enabled crtcs using 'pending_wait' wq. The above ensures that we send the events to userspace in vblank, and that after the wait in omap_atomic_complete() everything for the affected crtcs has been completed. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
969 lines
23 KiB
C
969 lines
23 KiB
C
/*
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* drivers/gpu/drm/omapdrm/omap_drv.c
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*
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* Copyright (C) 2011 Texas Instruments
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* Author: Rob Clark <rob@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/wait.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fb_helper.h>
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#include "omap_dmm_tiler.h"
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#include "omap_drv.h"
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#define DRIVER_NAME MODULE_NAME
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#define DRIVER_DESC "OMAP DRM"
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#define DRIVER_DATE "20110917"
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#define DRIVER_MAJOR 1
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#define DRIVER_MINOR 0
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#define DRIVER_PATCHLEVEL 0
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static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
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MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
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module_param(num_crtc, int, 0600);
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/*
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* mode config funcs
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*/
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/* Notes about mapping DSS and DRM entities:
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* CRTC: overlay
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* encoder: manager.. with some extension to allow one primary CRTC
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* and zero or more video CRTC's to be mapped to one encoder?
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* connector: dssdev.. manager can be attached/detached from different
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* devices
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*/
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static void omap_fb_output_poll_changed(struct drm_device *dev)
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{
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struct omap_drm_private *priv = dev->dev_private;
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DBG("dev=%p", dev);
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if (priv->fbdev)
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drm_fb_helper_hotplug_event(priv->fbdev);
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}
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struct omap_atomic_state_commit {
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struct work_struct work;
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struct drm_device *dev;
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struct drm_atomic_state *state;
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u32 crtcs;
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};
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static void omap_atomic_wait_for_completion(struct drm_device *dev,
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struct drm_atomic_state *old_state)
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{
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struct drm_crtc_state *old_crtc_state;
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struct drm_crtc *crtc;
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unsigned int i;
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int ret;
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for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) {
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if (!crtc->state->enable)
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continue;
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ret = omap_crtc_wait_pending(crtc);
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if (!ret)
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dev_warn(dev->dev,
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"atomic complete timeout (pipe %u)!\n", i);
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}
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}
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static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
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{
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struct drm_device *dev = commit->dev;
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struct omap_drm_private *priv = dev->dev_private;
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struct drm_atomic_state *old_state = commit->state;
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/* Apply the atomic update. */
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dispc_runtime_get();
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drm_atomic_helper_commit_modeset_disables(dev, old_state);
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drm_atomic_helper_commit_planes(dev, old_state);
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drm_atomic_helper_commit_modeset_enables(dev, old_state);
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omap_atomic_wait_for_completion(dev, old_state);
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drm_atomic_helper_cleanup_planes(dev, old_state);
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dispc_runtime_put();
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drm_atomic_state_free(old_state);
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/* Complete the commit, wake up any waiter. */
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spin_lock(&priv->commit.lock);
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priv->commit.pending &= ~commit->crtcs;
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spin_unlock(&priv->commit.lock);
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wake_up_all(&priv->commit.wait);
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kfree(commit);
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}
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static void omap_atomic_work(struct work_struct *work)
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{
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struct omap_atomic_state_commit *commit =
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container_of(work, struct omap_atomic_state_commit, work);
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omap_atomic_complete(commit);
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}
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static bool omap_atomic_is_pending(struct omap_drm_private *priv,
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struct omap_atomic_state_commit *commit)
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{
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bool pending;
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spin_lock(&priv->commit.lock);
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pending = priv->commit.pending & commit->crtcs;
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spin_unlock(&priv->commit.lock);
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return pending;
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}
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static int omap_atomic_commit(struct drm_device *dev,
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struct drm_atomic_state *state, bool async)
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{
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struct omap_drm_private *priv = dev->dev_private;
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struct omap_atomic_state_commit *commit;
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unsigned long flags;
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unsigned int i;
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int ret;
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ret = drm_atomic_helper_prepare_planes(dev, state);
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if (ret)
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return ret;
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/* Allocate the commit object. */
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commit = kzalloc(sizeof(*commit), GFP_KERNEL);
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if (commit == NULL) {
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ret = -ENOMEM;
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goto error;
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}
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INIT_WORK(&commit->work, omap_atomic_work);
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commit->dev = dev;
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commit->state = state;
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/* Wait until all affected CRTCs have completed previous commits and
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* mark them as pending.
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*/
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for (i = 0; i < dev->mode_config.num_crtc; ++i) {
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if (state->crtcs[i])
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commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]);
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}
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wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
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spin_lock(&priv->commit.lock);
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priv->commit.pending |= commit->crtcs;
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spin_unlock(&priv->commit.lock);
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/* Keep track of all CRTC events to unlink them in preclose(). */
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spin_lock_irqsave(&dev->event_lock, flags);
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for (i = 0; i < dev->mode_config.num_crtc; ++i) {
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struct drm_crtc_state *cstate = state->crtc_states[i];
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if (cstate && cstate->event)
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list_add_tail(&cstate->event->base.link,
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&priv->commit.events);
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}
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spin_unlock_irqrestore(&dev->event_lock, flags);
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/* Swap the state, this is the point of no return. */
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drm_atomic_helper_swap_state(dev, state);
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if (async)
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schedule_work(&commit->work);
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else
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omap_atomic_complete(commit);
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return 0;
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error:
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drm_atomic_helper_cleanup_planes(dev, state);
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return ret;
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}
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static const struct drm_mode_config_funcs omap_mode_config_funcs = {
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.fb_create = omap_framebuffer_create,
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.output_poll_changed = omap_fb_output_poll_changed,
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = omap_atomic_commit,
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};
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static int get_connector_type(struct omap_dss_device *dssdev)
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{
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switch (dssdev->type) {
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case OMAP_DISPLAY_TYPE_HDMI:
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return DRM_MODE_CONNECTOR_HDMIA;
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case OMAP_DISPLAY_TYPE_DVI:
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return DRM_MODE_CONNECTOR_DVID;
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default:
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return DRM_MODE_CONNECTOR_Unknown;
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}
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}
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static bool channel_used(struct drm_device *dev, enum omap_channel channel)
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{
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struct omap_drm_private *priv = dev->dev_private;
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int i;
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for (i = 0; i < priv->num_crtcs; i++) {
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struct drm_crtc *crtc = priv->crtcs[i];
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if (omap_crtc_channel(crtc) == channel)
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return true;
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}
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return false;
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}
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static void omap_disconnect_dssdevs(void)
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{
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struct omap_dss_device *dssdev = NULL;
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for_each_dss_dev(dssdev)
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dssdev->driver->disconnect(dssdev);
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}
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static int omap_connect_dssdevs(void)
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{
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int r;
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struct omap_dss_device *dssdev = NULL;
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bool no_displays = true;
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for_each_dss_dev(dssdev) {
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r = dssdev->driver->connect(dssdev);
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if (r == -EPROBE_DEFER) {
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omap_dss_put_device(dssdev);
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goto cleanup;
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} else if (r) {
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dev_warn(dssdev->dev, "could not connect display: %s\n",
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dssdev->name);
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} else {
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no_displays = false;
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}
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}
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if (no_displays)
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return -EPROBE_DEFER;
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return 0;
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cleanup:
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/*
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* if we are deferring probe, we disconnect the devices we previously
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* connected
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*/
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omap_disconnect_dssdevs();
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return r;
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}
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static int omap_modeset_create_crtc(struct drm_device *dev, int id,
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enum omap_channel channel)
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{
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struct omap_drm_private *priv = dev->dev_private;
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struct drm_plane *plane;
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struct drm_crtc *crtc;
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plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY);
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if (IS_ERR(plane))
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return PTR_ERR(plane);
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crtc = omap_crtc_init(dev, plane, channel, id);
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BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
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priv->crtcs[id] = crtc;
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priv->num_crtcs++;
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priv->planes[id] = plane;
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priv->num_planes++;
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return 0;
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}
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static int omap_modeset_init_properties(struct drm_device *dev)
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{
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struct omap_drm_private *priv = dev->dev_private;
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if (priv->has_dmm) {
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dev->mode_config.rotation_property =
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drm_mode_create_rotation_property(dev,
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BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) |
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BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270) |
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BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y));
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if (!dev->mode_config.rotation_property)
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return -ENOMEM;
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}
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priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
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if (!priv->zorder_prop)
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return -ENOMEM;
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return 0;
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}
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static int omap_modeset_init(struct drm_device *dev)
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{
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struct omap_drm_private *priv = dev->dev_private;
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struct omap_dss_device *dssdev = NULL;
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int num_ovls = dss_feat_get_num_ovls();
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int num_mgrs = dss_feat_get_num_mgrs();
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int num_crtcs;
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int i, id = 0;
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int ret;
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drm_mode_config_init(dev);
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omap_drm_irq_install(dev);
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ret = omap_modeset_init_properties(dev);
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if (ret < 0)
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return ret;
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/*
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* We usually don't want to create a CRTC for each manager, at least
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* not until we have a way to expose private planes to userspace.
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* Otherwise there would not be enough video pipes left for drm planes.
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* We use the num_crtc argument to limit the number of crtcs we create.
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*/
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num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
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dssdev = NULL;
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for_each_dss_dev(dssdev) {
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struct drm_connector *connector;
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struct drm_encoder *encoder;
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enum omap_channel channel;
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struct omap_overlay_manager *mgr;
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if (!omapdss_device_is_connected(dssdev))
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continue;
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encoder = omap_encoder_init(dev, dssdev);
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if (!encoder) {
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dev_err(dev->dev, "could not create encoder: %s\n",
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dssdev->name);
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return -ENOMEM;
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}
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connector = omap_connector_init(dev,
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get_connector_type(dssdev), dssdev, encoder);
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if (!connector) {
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dev_err(dev->dev, "could not create connector: %s\n",
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dssdev->name);
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return -ENOMEM;
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}
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BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
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BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
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priv->encoders[priv->num_encoders++] = encoder;
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priv->connectors[priv->num_connectors++] = connector;
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drm_mode_connector_attach_encoder(connector, encoder);
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/*
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* if we have reached the limit of the crtcs we are allowed to
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* create, let's not try to look for a crtc for this
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* panel/encoder and onwards, we will, of course, populate the
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* the possible_crtcs field for all the encoders with the final
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* set of crtcs we create
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*/
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if (id == num_crtcs)
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continue;
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/*
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* get the recommended DISPC channel for this encoder. For now,
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* we only try to get create a crtc out of the recommended, the
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* other possible channels to which the encoder can connect are
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* not considered.
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*/
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mgr = omapdss_find_mgr_from_display(dssdev);
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channel = mgr->id;
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/*
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* if this channel hasn't already been taken by a previously
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* allocated crtc, we create a new crtc for it
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*/
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if (!channel_used(dev, channel)) {
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ret = omap_modeset_create_crtc(dev, id, channel);
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if (ret < 0) {
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dev_err(dev->dev,
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"could not create CRTC (channel %u)\n",
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channel);
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return ret;
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}
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id++;
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}
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}
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/*
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* we have allocated crtcs according to the need of the panels/encoders,
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* adding more crtcs here if needed
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*/
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for (; id < num_crtcs; id++) {
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/* find a free manager for this crtc */
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for (i = 0; i < num_mgrs; i++) {
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if (!channel_used(dev, i))
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break;
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}
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if (i == num_mgrs) {
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/* this shouldn't really happen */
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dev_err(dev->dev, "no managers left for crtc\n");
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return -ENOMEM;
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}
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ret = omap_modeset_create_crtc(dev, id, i);
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if (ret < 0) {
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dev_err(dev->dev,
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"could not create CRTC (channel %u)\n", i);
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return ret;
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}
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}
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/*
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* Create normal planes for the remaining overlays:
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*/
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for (; id < num_ovls; id++) {
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struct drm_plane *plane;
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plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY);
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if (IS_ERR(plane))
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return PTR_ERR(plane);
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BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
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priv->planes[priv->num_planes++] = plane;
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}
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for (i = 0; i < priv->num_encoders; i++) {
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struct drm_encoder *encoder = priv->encoders[i];
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struct omap_dss_device *dssdev =
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omap_encoder_get_dssdev(encoder);
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struct omap_dss_device *output;
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output = omapdss_find_output_from_display(dssdev);
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/* figure out which crtc's we can connect the encoder to: */
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encoder->possible_crtcs = 0;
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for (id = 0; id < priv->num_crtcs; id++) {
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struct drm_crtc *crtc = priv->crtcs[id];
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enum omap_channel crtc_channel;
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crtc_channel = omap_crtc_channel(crtc);
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if (output->dispc_channel == crtc_channel) {
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encoder->possible_crtcs |= (1 << id);
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break;
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}
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}
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omap_dss_put_device(output);
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}
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DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
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priv->num_planes, priv->num_crtcs, priv->num_encoders,
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priv->num_connectors);
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dev->mode_config.min_width = 32;
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dev->mode_config.min_height = 32;
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/* note: eventually will need some cpu_is_omapXYZ() type stuff here
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* to fill in these limits properly on different OMAP generations..
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*/
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dev->mode_config.max_width = 2048;
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dev->mode_config.max_height = 2048;
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dev->mode_config.funcs = &omap_mode_config_funcs;
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drm_mode_config_reset(dev);
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return 0;
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}
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static void omap_modeset_free(struct drm_device *dev)
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{
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drm_mode_config_cleanup(dev);
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}
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/*
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* drm ioctl funcs
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*/
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|
|
static int ioctl_get_param(struct drm_device *dev, void *data,
|
|
struct drm_file *file_priv)
|
|
{
|
|
struct omap_drm_private *priv = dev->dev_private;
|
|
struct drm_omap_param *args = data;
|
|
|
|
DBG("%p: param=%llu", dev, args->param);
|
|
|
|
switch (args->param) {
|
|
case OMAP_PARAM_CHIPSET_ID:
|
|
args->value = priv->omaprev;
|
|
break;
|
|
default:
|
|
DBG("unknown parameter %lld", args->param);
|
|
return -EINVAL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ioctl_set_param(struct drm_device *dev, void *data,
|
|
struct drm_file *file_priv)
|
|
{
|
|
struct drm_omap_param *args = data;
|
|
|
|
switch (args->param) {
|
|
default:
|
|
DBG("unknown parameter %lld", args->param);
|
|
return -EINVAL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ioctl_gem_new(struct drm_device *dev, void *data,
|
|
struct drm_file *file_priv)
|
|
{
|
|
struct drm_omap_gem_new *args = data;
|
|
VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
|
|
args->size.bytes, args->flags);
|
|
return omap_gem_new_handle(dev, file_priv, args->size,
|
|
args->flags, &args->handle);
|
|
}
|
|
|
|
static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
|
|
struct drm_file *file_priv)
|
|
{
|
|
struct drm_omap_gem_cpu_prep *args = data;
|
|
struct drm_gem_object *obj;
|
|
int ret;
|
|
|
|
VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
|
|
|
|
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
|
|
if (!obj)
|
|
return -ENOENT;
|
|
|
|
ret = omap_gem_op_sync(obj, args->op);
|
|
|
|
if (!ret)
|
|
ret = omap_gem_op_start(obj, args->op);
|
|
|
|
drm_gem_object_unreference_unlocked(obj);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
|
|
struct drm_file *file_priv)
|
|
{
|
|
struct drm_omap_gem_cpu_fini *args = data;
|
|
struct drm_gem_object *obj;
|
|
int ret;
|
|
|
|
VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
|
|
|
|
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
|
|
if (!obj)
|
|
return -ENOENT;
|
|
|
|
/* XXX flushy, flushy */
|
|
ret = 0;
|
|
|
|
if (!ret)
|
|
ret = omap_gem_op_finish(obj, args->op);
|
|
|
|
drm_gem_object_unreference_unlocked(obj);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ioctl_gem_info(struct drm_device *dev, void *data,
|
|
struct drm_file *file_priv)
|
|
{
|
|
struct drm_omap_gem_info *args = data;
|
|
struct drm_gem_object *obj;
|
|
int ret = 0;
|
|
|
|
VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
|
|
|
|
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
|
|
if (!obj)
|
|
return -ENOENT;
|
|
|
|
args->size = omap_gem_mmap_size(obj);
|
|
args->offset = omap_gem_mmap_offset(obj);
|
|
|
|
drm_gem_object_unreference_unlocked(obj);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
|
|
DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
|
|
DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
|
|
DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
|
|
DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
|
|
DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
|
|
DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
|
|
};
|
|
|
|
/*
|
|
* drm driver funcs
|
|
*/
|
|
|
|
/**
|
|
* load - setup chip and create an initial config
|
|
* @dev: DRM device
|
|
* @flags: startup flags
|
|
*
|
|
* The driver load routine has to do several things:
|
|
* - initialize the memory manager
|
|
* - allocate initial config memory
|
|
* - setup the DRM framebuffer with the allocated memory
|
|
*/
|
|
static int dev_load(struct drm_device *dev, unsigned long flags)
|
|
{
|
|
struct omap_drm_platform_data *pdata = dev->dev->platform_data;
|
|
struct omap_drm_private *priv;
|
|
unsigned int i;
|
|
int ret;
|
|
|
|
DBG("load: dev=%p", dev);
|
|
|
|
priv = kzalloc(sizeof(*priv), GFP_KERNEL);
|
|
if (!priv)
|
|
return -ENOMEM;
|
|
|
|
priv->omaprev = pdata->omaprev;
|
|
|
|
dev->dev_private = priv;
|
|
|
|
priv->wq = alloc_ordered_workqueue("omapdrm", 0);
|
|
init_waitqueue_head(&priv->commit.wait);
|
|
spin_lock_init(&priv->commit.lock);
|
|
INIT_LIST_HEAD(&priv->commit.events);
|
|
|
|
spin_lock_init(&priv->list_lock);
|
|
INIT_LIST_HEAD(&priv->obj_list);
|
|
|
|
omap_gem_init(dev);
|
|
|
|
ret = omap_modeset_init(dev);
|
|
if (ret) {
|
|
dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
|
|
dev->dev_private = NULL;
|
|
kfree(priv);
|
|
return ret;
|
|
}
|
|
|
|
/* Initialize vblank handling, start with all CRTCs disabled. */
|
|
ret = drm_vblank_init(dev, priv->num_crtcs);
|
|
if (ret)
|
|
dev_warn(dev->dev, "could not init vblank\n");
|
|
|
|
for (i = 0; i < priv->num_crtcs; i++)
|
|
drm_crtc_vblank_off(priv->crtcs[i]);
|
|
|
|
priv->fbdev = omap_fbdev_init(dev);
|
|
if (!priv->fbdev) {
|
|
dev_warn(dev->dev, "omap_fbdev_init failed\n");
|
|
/* well, limp along without an fbdev.. maybe X11 will work? */
|
|
}
|
|
|
|
/* store off drm_device for use in pm ops */
|
|
dev_set_drvdata(dev->dev, dev);
|
|
|
|
drm_kms_helper_poll_init(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int dev_unload(struct drm_device *dev)
|
|
{
|
|
struct omap_drm_private *priv = dev->dev_private;
|
|
|
|
DBG("unload: dev=%p", dev);
|
|
|
|
drm_kms_helper_poll_fini(dev);
|
|
|
|
if (priv->fbdev)
|
|
omap_fbdev_free(dev);
|
|
|
|
omap_modeset_free(dev);
|
|
omap_gem_deinit(dev);
|
|
|
|
destroy_workqueue(priv->wq);
|
|
|
|
drm_vblank_cleanup(dev);
|
|
omap_drm_irq_uninstall(dev);
|
|
|
|
kfree(dev->dev_private);
|
|
dev->dev_private = NULL;
|
|
|
|
dev_set_drvdata(dev->dev, NULL);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int dev_open(struct drm_device *dev, struct drm_file *file)
|
|
{
|
|
file->driver_priv = NULL;
|
|
|
|
DBG("open: dev=%p, file=%p", dev, file);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* lastclose - clean up after all DRM clients have exited
|
|
* @dev: DRM device
|
|
*
|
|
* Take care of cleaning up after all DRM clients have exited. In the
|
|
* mode setting case, we want to restore the kernel's initial mode (just
|
|
* in case the last client left us in a bad state).
|
|
*/
|
|
static void dev_lastclose(struct drm_device *dev)
|
|
{
|
|
int i;
|
|
|
|
/* we don't support vga-switcheroo.. so just make sure the fbdev
|
|
* mode is active
|
|
*/
|
|
struct omap_drm_private *priv = dev->dev_private;
|
|
int ret;
|
|
|
|
DBG("lastclose: dev=%p", dev);
|
|
|
|
if (dev->mode_config.rotation_property) {
|
|
/* need to restore default rotation state.. not sure
|
|
* if there is a cleaner way to restore properties to
|
|
* default state? Maybe a flag that properties should
|
|
* automatically be restored to default state on
|
|
* lastclose?
|
|
*/
|
|
for (i = 0; i < priv->num_crtcs; i++) {
|
|
drm_object_property_set_value(&priv->crtcs[i]->base,
|
|
dev->mode_config.rotation_property, 0);
|
|
}
|
|
|
|
for (i = 0; i < priv->num_planes; i++) {
|
|
drm_object_property_set_value(&priv->planes[i]->base,
|
|
dev->mode_config.rotation_property, 0);
|
|
}
|
|
}
|
|
|
|
if (priv->fbdev) {
|
|
ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
|
|
if (ret)
|
|
DBG("failed to restore crtc mode");
|
|
}
|
|
}
|
|
|
|
static void dev_preclose(struct drm_device *dev, struct drm_file *file)
|
|
{
|
|
struct omap_drm_private *priv = dev->dev_private;
|
|
struct drm_pending_event *event;
|
|
unsigned long flags;
|
|
|
|
DBG("preclose: dev=%p", dev);
|
|
|
|
/*
|
|
* Unlink all pending CRTC events to make sure they won't be queued up
|
|
* by a pending asynchronous commit.
|
|
*/
|
|
spin_lock_irqsave(&dev->event_lock, flags);
|
|
list_for_each_entry(event, &priv->commit.events, link) {
|
|
if (event->file_priv == file) {
|
|
file->event_space += event->event->length;
|
|
event->file_priv = NULL;
|
|
}
|
|
}
|
|
spin_unlock_irqrestore(&dev->event_lock, flags);
|
|
}
|
|
|
|
static void dev_postclose(struct drm_device *dev, struct drm_file *file)
|
|
{
|
|
DBG("postclose: dev=%p, file=%p", dev, file);
|
|
}
|
|
|
|
static const struct vm_operations_struct omap_gem_vm_ops = {
|
|
.fault = omap_gem_fault,
|
|
.open = drm_gem_vm_open,
|
|
.close = drm_gem_vm_close,
|
|
};
|
|
|
|
static const struct file_operations omapdriver_fops = {
|
|
.owner = THIS_MODULE,
|
|
.open = drm_open,
|
|
.unlocked_ioctl = drm_ioctl,
|
|
.release = drm_release,
|
|
.mmap = omap_gem_mmap,
|
|
.poll = drm_poll,
|
|
.read = drm_read,
|
|
.llseek = noop_llseek,
|
|
};
|
|
|
|
static struct drm_driver omap_drm_driver = {
|
|
.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
|
|
.load = dev_load,
|
|
.unload = dev_unload,
|
|
.open = dev_open,
|
|
.lastclose = dev_lastclose,
|
|
.preclose = dev_preclose,
|
|
.postclose = dev_postclose,
|
|
.set_busid = drm_platform_set_busid,
|
|
.get_vblank_counter = drm_vblank_count,
|
|
.enable_vblank = omap_irq_enable_vblank,
|
|
.disable_vblank = omap_irq_disable_vblank,
|
|
#ifdef CONFIG_DEBUG_FS
|
|
.debugfs_init = omap_debugfs_init,
|
|
.debugfs_cleanup = omap_debugfs_cleanup,
|
|
#endif
|
|
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
|
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
|
.gem_prime_export = omap_gem_prime_export,
|
|
.gem_prime_import = omap_gem_prime_import,
|
|
.gem_free_object = omap_gem_free_object,
|
|
.gem_vm_ops = &omap_gem_vm_ops,
|
|
.dumb_create = omap_gem_dumb_create,
|
|
.dumb_map_offset = omap_gem_dumb_map_offset,
|
|
.dumb_destroy = drm_gem_dumb_destroy,
|
|
.ioctls = ioctls,
|
|
.num_ioctls = DRM_OMAP_NUM_IOCTLS,
|
|
.fops = &omapdriver_fops,
|
|
.name = DRIVER_NAME,
|
|
.desc = DRIVER_DESC,
|
|
.date = DRIVER_DATE,
|
|
.major = DRIVER_MAJOR,
|
|
.minor = DRIVER_MINOR,
|
|
.patchlevel = DRIVER_PATCHLEVEL,
|
|
};
|
|
|
|
static int pdev_probe(struct platform_device *device)
|
|
{
|
|
int r;
|
|
|
|
if (omapdss_is_initialized() == false)
|
|
return -EPROBE_DEFER;
|
|
|
|
omap_crtc_pre_init();
|
|
|
|
r = omap_connect_dssdevs();
|
|
if (r) {
|
|
omap_crtc_pre_uninit();
|
|
return r;
|
|
}
|
|
|
|
DBG("%s", device->name);
|
|
return drm_platform_init(&omap_drm_driver, device);
|
|
}
|
|
|
|
static int pdev_remove(struct platform_device *device)
|
|
{
|
|
DBG("");
|
|
|
|
drm_put_dev(platform_get_drvdata(device));
|
|
|
|
omap_disconnect_dssdevs();
|
|
omap_crtc_pre_uninit();
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int omap_drm_suspend(struct device *dev)
|
|
{
|
|
struct drm_device *drm_dev = dev_get_drvdata(dev);
|
|
|
|
drm_kms_helper_poll_disable(drm_dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int omap_drm_resume(struct device *dev)
|
|
{
|
|
struct drm_device *drm_dev = dev_get_drvdata(dev);
|
|
|
|
drm_kms_helper_poll_enable(drm_dev);
|
|
|
|
return omap_gem_resume(dev);
|
|
}
|
|
#endif
|
|
|
|
static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
|
|
|
|
static struct platform_driver pdev = {
|
|
.driver = {
|
|
.name = DRIVER_NAME,
|
|
.pm = &omapdrm_pm_ops,
|
|
},
|
|
.probe = pdev_probe,
|
|
.remove = pdev_remove,
|
|
};
|
|
|
|
static int __init omap_drm_init(void)
|
|
{
|
|
int r;
|
|
|
|
DBG("init");
|
|
|
|
r = platform_driver_register(&omap_dmm_driver);
|
|
if (r) {
|
|
pr_err("DMM driver registration failed\n");
|
|
return r;
|
|
}
|
|
|
|
r = platform_driver_register(&pdev);
|
|
if (r) {
|
|
pr_err("omapdrm driver registration failed\n");
|
|
platform_driver_unregister(&omap_dmm_driver);
|
|
return r;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void __exit omap_drm_fini(void)
|
|
{
|
|
DBG("fini");
|
|
|
|
platform_driver_unregister(&pdev);
|
|
|
|
platform_driver_unregister(&omap_dmm_driver);
|
|
}
|
|
|
|
/* need late_initcall() so we load after dss_driver's are loaded */
|
|
late_initcall(omap_drm_init);
|
|
module_exit(omap_drm_fini);
|
|
|
|
MODULE_AUTHOR("Rob Clark <rob@ti.com>");
|
|
MODULE_DESCRIPTION("OMAP DRM Display Driver");
|
|
MODULE_ALIAS("platform:" DRIVER_NAME);
|
|
MODULE_LICENSE("GPL v2");
|