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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-13 22:25:03 +00:00
4ed0d3e6c6
The patch adds kernel parameter intel_iommu=pt to set up pass through mode in context mapping entry. This disables DMAR in linux kernel; but KVM still runs on VT-d and interrupt remapping still works. In this mode, kernel uses swiotlb for DMA API functions but other VT-d functionalities are enabled for KVM. KVM always uses multi level translation page table in VT-d. By default, pass though mode is disabled in kernel. This is useful when people don't want to enable VT-d DMAR in kernel but still want to use KVM and interrupt remapping for reasons like DMAR performance concern or debug purpose. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Acked-by: Weidong Han <weidong@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
85 lines
2.1 KiB
C
85 lines
2.1 KiB
C
/* Glue code to lib/swiotlb.c */
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#include <linux/pci.h>
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#include <linux/cache.h>
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#include <linux/module.h>
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#include <linux/swiotlb.h>
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#include <linux/bootmem.h>
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#include <linux/dma-mapping.h>
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#include <asm/iommu.h>
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#include <asm/swiotlb.h>
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#include <asm/dma.h>
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int swiotlb __read_mostly;
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void * __init swiotlb_alloc_boot(size_t size, unsigned long nslabs)
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{
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return alloc_bootmem_low_pages(size);
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}
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void *swiotlb_alloc(unsigned order, unsigned long nslabs)
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{
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return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
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}
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dma_addr_t swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr)
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{
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return paddr;
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}
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phys_addr_t swiotlb_bus_to_phys(dma_addr_t baddr)
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{
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return baddr;
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}
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int __weak swiotlb_arch_range_needs_mapping(phys_addr_t paddr, size_t size)
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{
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return 0;
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}
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static void *x86_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
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dma_addr_t *dma_handle, gfp_t flags)
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{
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void *vaddr;
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vaddr = dma_generic_alloc_coherent(hwdev, size, dma_handle, flags);
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if (vaddr)
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return vaddr;
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return swiotlb_alloc_coherent(hwdev, size, dma_handle, flags);
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}
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static struct dma_map_ops swiotlb_dma_ops = {
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.mapping_error = swiotlb_dma_mapping_error,
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.alloc_coherent = x86_swiotlb_alloc_coherent,
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.free_coherent = swiotlb_free_coherent,
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.sync_single_for_cpu = swiotlb_sync_single_for_cpu,
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.sync_single_for_device = swiotlb_sync_single_for_device,
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.sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu,
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.sync_single_range_for_device = swiotlb_sync_single_range_for_device,
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.sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
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.sync_sg_for_device = swiotlb_sync_sg_for_device,
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.map_sg = swiotlb_map_sg_attrs,
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.unmap_sg = swiotlb_unmap_sg_attrs,
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.map_page = swiotlb_map_page,
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.unmap_page = swiotlb_unmap_page,
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.dma_supported = NULL,
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};
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void __init pci_swiotlb_init(void)
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{
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/* don't initialize swiotlb if iommu=off (no_iommu=1) */
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#ifdef CONFIG_X86_64
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if ((!iommu_detected && !no_iommu && max_pfn > MAX_DMA32_PFN) ||
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iommu_pass_through)
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swiotlb = 1;
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#endif
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if (swiotlb_force)
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swiotlb = 1;
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if (swiotlb) {
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printk(KERN_INFO "PCI-DMA: Using software bounce buffering for IO (SWIOTLB)\n");
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swiotlb_init();
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dma_ops = &swiotlb_dma_ops;
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}
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}
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