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4ef702c10b
For some time each panic() called with interrupts disabled triggered the !irqs_disabled() WARN_ON in smp_call_function(), producing ugly backtraces and confusing users. This is a common situation with machine checks for example which tend to call panic with interrupts disabled, but will also hit in other situations e.g. panic during early boot. In fact it means that panic cannot be called in many circumstances, which would be bad. This all started with the new fancy queued smp_call_function, which is then used by the shutdown path to shut down the other CPUs. On closer examination it turned out that the fancy RCU smp_call_function() does lots of things not suitable in a panic situation anyways, like allocating memory and relying on complex system state. I originally tried to patch this over by checking for panic there, but it was quite complicated and the original patch was also not very popular. This also didn't fix some of the underlying complexity problems. The new code in post 2.6.29 tries to patch around this by checking for oops_in_progress, but that is not enough to make this fully safe and I don't think that's a real solution because panic has to be reliable. So instead use an own vector to reboot. This makes the reboot code extremly straight forward, which is definitely a big plus in a panic situation where it is important to avoid relying on too much kernel state. The new simple code is also safe to be called from interupts off region because it is very very simple. There can be situations where it is important that panic is reliable. For example on a fatal machine check the panic is needed to get the system up again and running as quickly as possible. So it's important that panic is reliable and all function it calls simple. This is why I came up with this simple vector scheme. It's very hard to beat in simplicity. Vectors are not particularly precious anymore since all big systems are using per CPU vectors. Another possibility would have been to use an NMI similar to kdump, but there is still the problem that NMIs don't work reliably on some systems due to BIOS issues. NMIs would have been able to stop CPUs running with interrupts off too. In the sake of universal reliability I opted for using a non NMI vector for now. I put the reboot vector into the highest priority bucket of the APIC vectors and moved the 64bit UV_BAU message down instead into the next lower priority. [ Impact: bug fix, fixes an old regression ] Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
176 lines
4.7 KiB
C
176 lines
4.7 KiB
C
#ifndef _ASM_X86_IRQ_VECTORS_H
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#define _ASM_X86_IRQ_VECTORS_H
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/*
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* Linux IRQ vector layout.
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*
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* There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
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* be defined by Linux. They are used as a jump table by the CPU when a
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* given vector is triggered - by a CPU-external, CPU-internal or
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* software-triggered event.
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*
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* Linux sets the kernel code address each entry jumps to early during
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* bootup, and never changes them. This is the general layout of the
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* IDT entries:
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*
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* Vectors 0 ... 31 : system traps and exceptions - hardcoded events
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* Vectors 32 ... 127 : device interrupts
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* Vector 128 : legacy int80 syscall interface
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* Vectors 129 ... 237 : device interrupts
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* Vectors 238 ... 255 : special interrupts
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*
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* 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
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*
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* This file enumerates the exact layout of them:
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*/
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#define NMI_VECTOR 0x02
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/*
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* IDT vectors usable for external interrupt sources start
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* at 0x20:
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*/
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#define FIRST_EXTERNAL_VECTOR 0x20
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#ifdef CONFIG_X86_32
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# define SYSCALL_VECTOR 0x80
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# define IA32_SYSCALL_VECTOR 0x80
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#else
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# define IA32_SYSCALL_VECTOR 0x80
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#endif
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/*
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* Reserve the lowest usable priority level 0x20 - 0x2f for triggering
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* cleanup after irq migration.
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*/
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#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
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/*
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* Vectors 0x30-0x3f are used for ISA interrupts.
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*/
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#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
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#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
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#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
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#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
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#define IRQ4_VECTOR (IRQ0_VECTOR + 4)
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#define IRQ5_VECTOR (IRQ0_VECTOR + 5)
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#define IRQ6_VECTOR (IRQ0_VECTOR + 6)
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#define IRQ7_VECTOR (IRQ0_VECTOR + 7)
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#define IRQ8_VECTOR (IRQ0_VECTOR + 8)
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#define IRQ9_VECTOR (IRQ0_VECTOR + 9)
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#define IRQ10_VECTOR (IRQ0_VECTOR + 10)
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#define IRQ11_VECTOR (IRQ0_VECTOR + 11)
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#define IRQ12_VECTOR (IRQ0_VECTOR + 12)
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#define IRQ13_VECTOR (IRQ0_VECTOR + 13)
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#define IRQ14_VECTOR (IRQ0_VECTOR + 14)
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#define IRQ15_VECTOR (IRQ0_VECTOR + 15)
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/*
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* Special IRQ vectors used by the SMP architecture, 0xf0-0xff
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*
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* some of the following vectors are 'rare', they are merged
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* into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
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* TLB, reschedule and local APIC vectors are performance-critical.
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*/
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#define SPURIOUS_APIC_VECTOR 0xff
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/*
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* Sanity check
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*/
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#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
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# error SPURIOUS_APIC_VECTOR definition error
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#endif
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#define ERROR_APIC_VECTOR 0xfe
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#define RESCHEDULE_VECTOR 0xfd
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#define CALL_FUNCTION_VECTOR 0xfc
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#define CALL_FUNCTION_SINGLE_VECTOR 0xfb
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#define THERMAL_APIC_VECTOR 0xfa
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#define THRESHOLD_APIC_VECTOR 0xf9
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#define REBOOT_VECTOR 0xf8
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/* f0-f7 used for spreading out TLB flushes: */
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#define INVALIDATE_TLB_VECTOR_END 0xf7
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#define INVALIDATE_TLB_VECTOR_START 0xf0
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#define NUM_INVALIDATE_TLB_VECTORS 8
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/*
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* Local APIC timer IRQ vector is on a different priority level,
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* to work around the 'lost local interrupt if more than 2 IRQ
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* sources per level' errata.
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*/
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#define LOCAL_TIMER_VECTOR 0xef
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/*
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* Performance monitoring interrupt vector:
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*/
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#define LOCAL_PERF_VECTOR 0xee
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/*
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* Generic system vector for platform specific use
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*/
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#define GENERIC_INTERRUPT_VECTOR 0xed
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#define UV_BAU_MESSAGE 0xec
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/*
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* Self IPI vector for machine checks
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*/
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#define MCE_SELF_VECTOR 0xeb
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/*
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* First APIC vector available to drivers: (vectors 0x30-0xee) we
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* start at 0x31(0x41) to spread out vectors evenly between priority
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* levels. (0x80 is the syscall vector)
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*/
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#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
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#define NR_VECTORS 256
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#define FPU_IRQ 13
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#define FIRST_VM86_IRQ 3
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#define LAST_VM86_IRQ 15
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#ifndef __ASSEMBLY__
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static inline int invalid_vm86_irq(int irq)
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{
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return irq < FIRST_VM86_IRQ || irq > LAST_VM86_IRQ;
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}
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#endif
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/*
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* Size the maximum number of interrupts.
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*
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* If the irq_desc[] array has a sparse layout, we can size things
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* generously - it scales up linearly with the maximum number of CPUs,
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* and the maximum number of IO-APICs, whichever is higher.
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*
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* In other cases we size more conservatively, to not create too large
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* static arrays.
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*/
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#define NR_IRQS_LEGACY 16
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#define CPU_VECTOR_LIMIT ( 8 * NR_CPUS )
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#define IO_APIC_VECTOR_LIMIT ( 32 * MAX_IO_APICS )
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#ifdef CONFIG_X86_IO_APIC
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# ifdef CONFIG_SPARSE_IRQ
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# define NR_IRQS \
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(CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ? \
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(NR_VECTORS + CPU_VECTOR_LIMIT) : \
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(NR_VECTORS + IO_APIC_VECTOR_LIMIT))
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# else
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# if NR_CPUS < MAX_IO_APICS
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# define NR_IRQS (NR_VECTORS + 4*CPU_VECTOR_LIMIT)
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# else
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# define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT)
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# endif
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# endif
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#else /* !CONFIG_X86_IO_APIC: */
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# define NR_IRQS NR_IRQS_LEGACY
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#endif
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#endif /* _ASM_X86_IRQ_VECTORS_H */
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