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![Pawel Moll](/assets/img/avatar_default.png)
The last reason for static memory mapping is the HBI (board identification number) check early in the machine code. Moving the check to the sysreg driver makes it possible to completely remove the early mapping and init functions. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Lee Jones <lee.jones@linaro.org>
276 lines
7 KiB
C
276 lines
7 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Copyright (C) 2012 ARM Limited
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*/
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#include <linux/basic_mmio_gpio.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/mfd/core.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/platform_data/syscon.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/stat.h>
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#include <linux/vexpress.h>
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#define SYS_ID 0x000
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#define SYS_SW 0x004
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#define SYS_LED 0x008
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#define SYS_100HZ 0x024
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#define SYS_FLAGSSET 0x030
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#define SYS_FLAGSCLR 0x034
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#define SYS_NVFLAGS 0x038
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#define SYS_NVFLAGSSET 0x038
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#define SYS_NVFLAGSCLR 0x03c
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#define SYS_MCI 0x048
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#define SYS_FLASH 0x04c
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#define SYS_CFGSW 0x058
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#define SYS_24MHZ 0x05c
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#define SYS_MISC 0x060
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#define SYS_DMA 0x064
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#define SYS_PROCID0 0x084
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#define SYS_PROCID1 0x088
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#define SYS_CFGDATA 0x0a0
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#define SYS_CFGCTRL 0x0a4
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#define SYS_CFGSTAT 0x0a8
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#define SYS_HBI_MASK 0xfff
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#define SYS_PROCIDx_HBI_SHIFT 0
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#define SYS_MCI_CARDIN (1 << 0)
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#define SYS_MCI_WPROT (1 << 1)
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#define SYS_MISC_MASTERSITE (1 << 14)
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static void __iomem *__vexpress_sysreg_base;
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static void __iomem *vexpress_sysreg_base(void)
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{
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if (!__vexpress_sysreg_base) {
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struct device_node *node = of_find_compatible_node(NULL, NULL,
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"arm,vexpress-sysreg");
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__vexpress_sysreg_base = of_iomap(node, 0);
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}
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WARN_ON(!__vexpress_sysreg_base);
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return __vexpress_sysreg_base;
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}
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static int vexpress_sysreg_get_master(void)
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{
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if (readl(vexpress_sysreg_base() + SYS_MISC) & SYS_MISC_MASTERSITE)
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return VEXPRESS_SITE_DB2;
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return VEXPRESS_SITE_DB1;
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}
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void vexpress_flags_set(u32 data)
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{
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writel(~0, vexpress_sysreg_base() + SYS_FLAGSCLR);
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writel(data, vexpress_sysreg_base() + SYS_FLAGSSET);
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}
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unsigned int vexpress_get_mci_cardin(struct device *dev)
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{
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return readl(vexpress_sysreg_base() + SYS_MCI) & SYS_MCI_CARDIN;
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}
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u32 vexpress_get_procid(int site)
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{
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if (site == VEXPRESS_SITE_MASTER)
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site = vexpress_sysreg_get_master();
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return readl(vexpress_sysreg_base() + (site == VEXPRESS_SITE_DB1 ?
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SYS_PROCID0 : SYS_PROCID1));
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}
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void __iomem *vexpress_get_24mhz_clock_base(void)
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{
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return vexpress_sysreg_base() + SYS_24MHZ;
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}
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void __init vexpress_sysreg_early_init(void __iomem *base)
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{
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__vexpress_sysreg_base = base;
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vexpress_config_set_master(vexpress_sysreg_get_master());
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}
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/* The sysreg block is just a random collection of various functions... */
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static struct syscon_platform_data vexpress_sysreg_sys_id_pdata = {
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.label = "sys_id",
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};
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static struct bgpio_pdata vexpress_sysreg_sys_led_pdata = {
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.label = "sys_led",
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.base = -1,
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.ngpio = 8,
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};
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static struct bgpio_pdata vexpress_sysreg_sys_mci_pdata = {
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.label = "sys_mci",
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.base = -1,
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.ngpio = 2,
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};
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static struct bgpio_pdata vexpress_sysreg_sys_flash_pdata = {
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.label = "sys_flash",
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.base = -1,
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.ngpio = 1,
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};
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static struct syscon_platform_data vexpress_sysreg_sys_misc_pdata = {
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.label = "sys_misc",
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};
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static struct syscon_platform_data vexpress_sysreg_sys_procid_pdata = {
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.label = "sys_procid",
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};
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static struct mfd_cell vexpress_sysreg_cells[] = {
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{
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.name = "syscon",
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.num_resources = 1,
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.resources = (struct resource []) {
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DEFINE_RES_MEM(SYS_ID, 0x4),
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},
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.platform_data = &vexpress_sysreg_sys_id_pdata,
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.pdata_size = sizeof(vexpress_sysreg_sys_id_pdata),
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}, {
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.name = "basic-mmio-gpio",
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.of_compatible = "arm,vexpress-sysreg,sys_led",
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.num_resources = 1,
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.resources = (struct resource []) {
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DEFINE_RES_MEM_NAMED(SYS_LED, 0x4, "dat"),
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},
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.platform_data = &vexpress_sysreg_sys_led_pdata,
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.pdata_size = sizeof(vexpress_sysreg_sys_led_pdata),
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}, {
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.name = "basic-mmio-gpio",
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.of_compatible = "arm,vexpress-sysreg,sys_mci",
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.num_resources = 1,
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.resources = (struct resource []) {
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DEFINE_RES_MEM_NAMED(SYS_MCI, 0x4, "dat"),
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},
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.platform_data = &vexpress_sysreg_sys_mci_pdata,
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.pdata_size = sizeof(vexpress_sysreg_sys_mci_pdata),
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}, {
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.name = "basic-mmio-gpio",
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.of_compatible = "arm,vexpress-sysreg,sys_flash",
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.num_resources = 1,
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.resources = (struct resource []) {
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DEFINE_RES_MEM_NAMED(SYS_FLASH, 0x4, "dat"),
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},
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.platform_data = &vexpress_sysreg_sys_flash_pdata,
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.pdata_size = sizeof(vexpress_sysreg_sys_flash_pdata),
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}, {
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.name = "syscon",
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.num_resources = 1,
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.resources = (struct resource []) {
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DEFINE_RES_MEM(SYS_MISC, 0x4),
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},
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.platform_data = &vexpress_sysreg_sys_misc_pdata,
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.pdata_size = sizeof(vexpress_sysreg_sys_misc_pdata),
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}, {
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.name = "syscon",
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.num_resources = 1,
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.resources = (struct resource []) {
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DEFINE_RES_MEM(SYS_PROCID0, 0x8),
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},
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.platform_data = &vexpress_sysreg_sys_procid_pdata,
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.pdata_size = sizeof(vexpress_sysreg_sys_procid_pdata),
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}, {
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.name = "vexpress-syscfg",
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.num_resources = 1,
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.resources = (struct resource []) {
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DEFINE_RES_MEM(SYS_CFGDATA, 0xc),
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},
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}
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};
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static int vexpress_sysreg_probe(struct platform_device *pdev)
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{
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struct resource *mem;
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void __iomem *base;
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struct bgpio_chip *mmc_gpio_chip;
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u32 dt_hbi;
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!mem)
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return -EINVAL;
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base = devm_ioremap(&pdev->dev, mem->start, resource_size(mem));
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if (!base)
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return -ENOMEM;
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vexpress_config_set_master(vexpress_sysreg_get_master());
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/* Confirm board type against DT property, if available */
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if (of_property_read_u32(of_allnodes, "arm,hbi", &dt_hbi) == 0) {
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u32 id = vexpress_get_procid(VEXPRESS_SITE_MASTER);
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u32 hbi = (id >> SYS_PROCIDx_HBI_SHIFT) & SYS_HBI_MASK;
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if (WARN_ON(dt_hbi != hbi))
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dev_warn(&pdev->dev, "DT HBI (%x) is not matching hardware (%x)!\n",
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dt_hbi, hbi);
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}
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/*
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* Duplicated SYS_MCI pseudo-GPIO controller for compatibility with
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* older trees using sysreg node for MMC control lines.
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*/
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mmc_gpio_chip = devm_kzalloc(&pdev->dev, sizeof(*mmc_gpio_chip),
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GFP_KERNEL);
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if (!mmc_gpio_chip)
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return -ENOMEM;
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bgpio_init(mmc_gpio_chip, &pdev->dev, 0x4, base + SYS_MCI,
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NULL, NULL, NULL, NULL, 0);
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mmc_gpio_chip->gc.ngpio = 2;
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gpiochip_add(&mmc_gpio_chip->gc);
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return mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
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vexpress_sysreg_cells,
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ARRAY_SIZE(vexpress_sysreg_cells), mem, 0, NULL);
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}
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static const struct of_device_id vexpress_sysreg_match[] = {
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{ .compatible = "arm,vexpress-sysreg", },
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{},
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};
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static struct platform_driver vexpress_sysreg_driver = {
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.driver = {
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.name = "vexpress-sysreg",
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.of_match_table = vexpress_sysreg_match,
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},
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.probe = vexpress_sysreg_probe,
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};
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static int __init vexpress_sysreg_init(void)
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{
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struct device_node *node;
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/* Need the sysreg early, before any other device... */
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for_each_matching_node(node, vexpress_sysreg_match)
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of_platform_device_create(node, NULL, NULL);
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return platform_driver_register(&vexpress_sysreg_driver);
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}
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core_initcall(vexpress_sysreg_init);
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