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After loading firmware, the driver triggers ATI (calibration) with the newly loaded register configuration in place. Next, the driver polls a register field to ensure ATI completed in a timely fashion and that the device is ready to sense. However, communicating with the device over I2C while ATI is under- way may induce noise in the device and cause ATI to fail. As such, the vendor recommends not to poll the device during ATI. To solve this problem, let the device naturally signal to the host that ATI is complete by way of an interrupt. A completion prevents the sub-devices from being registered until this happens. The former logic that scaled ATI timeout and filter settling delay is not carried forward with the new implementation, as it produces overly conservative delays at lower clock rates. Instead, a single pair of delays that covers all cases is used. Signed-off-by: Jeff LaBundy <jeff@labundy.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
136 lines
2.7 KiB
C
136 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Azoteq IQS620A/621/622/624/625 Multi-Function Sensors
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*
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* Copyright (C) 2019 Jeff LaBundy <jeff@labundy.com>
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*/
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#ifndef __LINUX_MFD_IQS62X_H
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#define __LINUX_MFD_IQS62X_H
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#define IQS620_PROD_NUM 0x41
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#define IQS621_PROD_NUM 0x46
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#define IQS622_PROD_NUM 0x42
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#define IQS624_PROD_NUM 0x43
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#define IQS625_PROD_NUM 0x4E
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#define IQS621_ALS_FLAGS 0x16
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#define IQS622_ALS_FLAGS 0x14
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#define IQS624_HALL_UI 0x70
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#define IQS624_HALL_UI_WHL_EVENT BIT(4)
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#define IQS624_HALL_UI_INT_EVENT BIT(3)
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#define IQS624_HALL_UI_AUTO_CAL BIT(2)
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#define IQS624_INTERVAL_DIV 0x7D
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#define IQS620_GLBL_EVENT_MASK 0xD7
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#define IQS620_GLBL_EVENT_MASK_PMU BIT(6)
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#define IQS62X_NUM_KEYS 16
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#define IQS62X_NUM_EVENTS (IQS62X_NUM_KEYS + 6)
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#define IQS62X_EVENT_SIZE 10
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enum iqs62x_ui_sel {
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IQS62X_UI_PROX,
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IQS62X_UI_SAR1,
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};
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enum iqs62x_event_reg {
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IQS62X_EVENT_NONE,
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IQS62X_EVENT_SYS,
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IQS62X_EVENT_PROX,
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IQS62X_EVENT_HYST,
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IQS62X_EVENT_HALL,
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IQS62X_EVENT_ALS,
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IQS62X_EVENT_IR,
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IQS62X_EVENT_WHEEL,
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IQS62X_EVENT_INTER,
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IQS62X_EVENT_UI_LO,
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IQS62X_EVENT_UI_HI,
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};
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enum iqs62x_event_flag {
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/* keys */
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IQS62X_EVENT_PROX_CH0_T,
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IQS62X_EVENT_PROX_CH0_P,
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IQS62X_EVENT_PROX_CH1_T,
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IQS62X_EVENT_PROX_CH1_P,
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IQS62X_EVENT_PROX_CH2_T,
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IQS62X_EVENT_PROX_CH2_P,
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IQS62X_EVENT_HYST_POS_T,
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IQS62X_EVENT_HYST_POS_P,
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IQS62X_EVENT_HYST_NEG_T,
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IQS62X_EVENT_HYST_NEG_P,
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IQS62X_EVENT_SAR1_ACT,
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IQS62X_EVENT_SAR1_QRD,
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IQS62X_EVENT_SAR1_MOVE,
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IQS62X_EVENT_SAR1_HALT,
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IQS62X_EVENT_WHEEL_UP,
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IQS62X_EVENT_WHEEL_DN,
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/* switches */
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IQS62X_EVENT_HALL_N_T,
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IQS62X_EVENT_HALL_N_P,
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IQS62X_EVENT_HALL_S_T,
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IQS62X_EVENT_HALL_S_P,
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/* everything else */
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IQS62X_EVENT_SYS_RESET,
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IQS62X_EVENT_SYS_ATI,
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};
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struct iqs62x_event_data {
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u16 ui_data;
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u8 als_flags;
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u8 ir_flags;
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u8 interval;
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};
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struct iqs62x_event_desc {
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enum iqs62x_event_reg reg;
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u8 mask;
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u8 val;
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};
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struct iqs62x_dev_desc {
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const char *dev_name;
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const struct mfd_cell *sub_devs;
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int num_sub_devs;
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u8 prod_num;
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u8 sw_num;
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const u8 *cal_regs;
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int num_cal_regs;
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u8 prox_mask;
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u8 sar_mask;
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u8 hall_mask;
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u8 hyst_mask;
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u8 temp_mask;
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u8 als_mask;
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u8 ir_mask;
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u8 prox_settings;
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u8 als_flags;
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u8 hall_flags;
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u8 hyst_shift;
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u8 interval;
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u8 interval_div;
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const char *fw_name;
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const enum iqs62x_event_reg (*event_regs)[IQS62X_EVENT_SIZE];
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};
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struct iqs62x_core {
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const struct iqs62x_dev_desc *dev_desc;
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struct i2c_client *client;
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struct regmap *regmap;
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struct blocking_notifier_head nh;
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struct list_head fw_blk_head;
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struct completion ati_done;
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struct completion fw_done;
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enum iqs62x_ui_sel ui_sel;
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unsigned long event_cache;
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};
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extern const struct iqs62x_event_desc iqs62x_events[IQS62X_NUM_EVENTS];
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#endif /* __LINUX_MFD_IQS62X_H */
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