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30ae3e13ca
Set max_busy_timeouts for variants known to support the TOPxx bits in the SD_OPTION register. The timeout mechanism was running in the background but not yet properly handled in the driver. So, let the MMC core know when to not use R1B to avoid unhandled timeouts. My datasheets for older variants (tmio_mmc.c) suggest that they support it, too. However, actual bit descriptions are lacking, so I chose an opt-in approach. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201125213001.15003-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
139 lines
3.8 KiB
C
139 lines
3.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef MFD_TMIO_H
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#define MFD_TMIO_H
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#include <linux/device.h>
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#include <linux/fb.h>
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#include <linux/io.h>
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#include <linux/jiffies.h>
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#include <linux/mmc/card.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#define tmio_ioread8(addr) readb(addr)
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#define tmio_ioread16(addr) readw(addr)
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#define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
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#define tmio_ioread32(addr) \
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(((u32)readw((addr))) | (((u32)readw((addr) + 2)) << 16))
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#define tmio_iowrite8(val, addr) writeb((val), (addr))
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#define tmio_iowrite16(val, addr) writew((val), (addr))
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#define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
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#define tmio_iowrite32(val, addr) \
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do { \
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writew((val), (addr)); \
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writew((val) >> 16, (addr) + 2); \
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} while (0)
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#define sd_config_write8(base, shift, reg, val) \
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tmio_iowrite8((val), (base) + ((reg) << (shift)))
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#define sd_config_write16(base, shift, reg, val) \
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tmio_iowrite16((val), (base) + ((reg) << (shift)))
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#define sd_config_write32(base, shift, reg, val) \
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do { \
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tmio_iowrite16((val), (base) + ((reg) << (shift))); \
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tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \
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} while (0)
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/* tmio MMC platform flags */
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/*
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* Some controllers can support a 2-byte block size when the bus width
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* is configured in 4-bit mode.
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*/
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#define TMIO_MMC_BLKSZ_2BYTES BIT(1)
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/*
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* Some controllers can support SDIO IRQ signalling.
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*/
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#define TMIO_MMC_SDIO_IRQ BIT(2)
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/* Some features are only available or tested on R-Car Gen2 or later */
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#define TMIO_MMC_MIN_RCAR2 BIT(3)
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/*
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* Some controllers require waiting for the SD bus to become
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* idle before writing to some registers.
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*/
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#define TMIO_MMC_HAS_IDLE_WAIT BIT(4)
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/*
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* Use the busy timeout feature. Probably all TMIO versions support it. Yet,
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* we don't have documentation for old variants, so we enable only known good
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* variants with this flag. Can be removed once all variants are known good.
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*/
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#define TMIO_MMC_USE_BUSY_TIMEOUT BIT(5)
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/*
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* Some controllers have CMD12 automatically
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* issue/non-issue register
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*/
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#define TMIO_MMC_HAVE_CMD12_CTRL BIT(7)
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/* Controller has some SDIO status bits which must be 1 */
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#define TMIO_MMC_SDIO_STATUS_SETBITS BIT(8)
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/*
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* Some controllers have a 32-bit wide data port register
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*/
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#define TMIO_MMC_32BIT_DATA_PORT BIT(9)
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/*
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* Some controllers allows to set SDx actual clock
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*/
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#define TMIO_MMC_CLK_ACTUAL BIT(10)
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/* Some controllers have a CBSY bit */
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#define TMIO_MMC_HAVE_CBSY BIT(11)
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int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
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int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
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void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
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void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state);
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struct dma_chan;
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/*
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* data for the MMC controller
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*/
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struct tmio_mmc_data {
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void *chan_priv_tx;
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void *chan_priv_rx;
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unsigned int hclk;
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unsigned long capabilities;
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unsigned long capabilities2;
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unsigned long flags;
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u32 ocr_mask; /* available voltages */
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int alignment_shift;
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dma_addr_t dma_rx_offset;
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unsigned int max_blk_count;
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unsigned short max_segs;
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void (*set_pwr)(struct platform_device *host, int state);
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void (*set_clk_div)(struct platform_device *host, int state);
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};
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/*
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* data for the NAND controller
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*/
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struct tmio_nand_data {
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struct nand_bbt_descr *badblock_pattern;
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struct mtd_partition *partition;
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unsigned int num_partitions;
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const char *const *part_parsers;
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};
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#define FBIO_TMIO_ACC_WRITE 0x7C639300
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#define FBIO_TMIO_ACC_SYNC 0x7C639301
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struct tmio_fb_data {
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int (*lcd_set_power)(struct platform_device *fb_dev,
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bool on);
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int (*lcd_mode)(struct platform_device *fb_dev,
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const struct fb_videomode *mode);
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int num_modes;
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struct fb_videomode *modes;
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/* in mm: size of screen */
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int height;
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int width;
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};
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#endif
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