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![Li Huafei](/assets/img/avatar_default.png)
The sparse tool complains as follows: arch/powerpc/kernel/security.c:253:6: warning: symbol 'stf_barrier' was not declared. Should it be static? This symbol is not used outside of security.c, so this commit marks it static. Signed-off-by: Li Huafei <lihuafei1@huawei.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210408033951.28369-1-lihuafei1@huawei.com
844 lines
21 KiB
C
844 lines
21 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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//
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// Security related flags and so on.
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//
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// Copyright 2018, Michael Ellerman, IBM Corporation.
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#include <linux/cpu.h>
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/memblock.h>
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#include <linux/nospec.h>
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#include <linux/prctl.h>
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#include <linux/seq_buf.h>
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#include <asm/asm-prototypes.h>
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#include <asm/code-patching.h>
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#include <asm/debugfs.h>
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#include <asm/security_features.h>
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#include <asm/setup.h>
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#include <asm/inst.h>
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#include "setup.h"
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u64 powerpc_security_features __read_mostly = SEC_FTR_DEFAULT;
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enum branch_cache_flush_type {
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BRANCH_CACHE_FLUSH_NONE = 0x1,
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BRANCH_CACHE_FLUSH_SW = 0x2,
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BRANCH_CACHE_FLUSH_HW = 0x4,
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};
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static enum branch_cache_flush_type count_cache_flush_type = BRANCH_CACHE_FLUSH_NONE;
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static enum branch_cache_flush_type link_stack_flush_type = BRANCH_CACHE_FLUSH_NONE;
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bool barrier_nospec_enabled;
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static bool no_nospec;
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static bool btb_flush_enabled;
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#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
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static bool no_spectrev2;
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#endif
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static void enable_barrier_nospec(bool enable)
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{
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barrier_nospec_enabled = enable;
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do_barrier_nospec_fixups(enable);
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}
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void setup_barrier_nospec(void)
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{
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bool enable;
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/*
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* It would make sense to check SEC_FTR_SPEC_BAR_ORI31 below as well.
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* But there's a good reason not to. The two flags we check below are
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* both are enabled by default in the kernel, so if the hcall is not
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* functional they will be enabled.
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* On a system where the host firmware has been updated (so the ori
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* functions as a barrier), but on which the hypervisor (KVM/Qemu) has
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* not been updated, we would like to enable the barrier. Dropping the
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* check for SEC_FTR_SPEC_BAR_ORI31 achieves that. The only downside is
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* we potentially enable the barrier on systems where the host firmware
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* is not updated, but that's harmless as it's a no-op.
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*/
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enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
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security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR);
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if (!no_nospec && !cpu_mitigations_off())
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enable_barrier_nospec(enable);
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}
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static int __init handle_nospectre_v1(char *p)
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{
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no_nospec = true;
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return 0;
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}
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early_param("nospectre_v1", handle_nospectre_v1);
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#ifdef CONFIG_DEBUG_FS
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static int barrier_nospec_set(void *data, u64 val)
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{
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switch (val) {
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case 0:
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case 1:
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break;
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default:
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return -EINVAL;
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}
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if (!!val == !!barrier_nospec_enabled)
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return 0;
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enable_barrier_nospec(!!val);
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return 0;
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}
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static int barrier_nospec_get(void *data, u64 *val)
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{
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*val = barrier_nospec_enabled ? 1 : 0;
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return 0;
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}
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DEFINE_DEBUGFS_ATTRIBUTE(fops_barrier_nospec, barrier_nospec_get,
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barrier_nospec_set, "%llu\n");
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static __init int barrier_nospec_debugfs_init(void)
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{
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debugfs_create_file_unsafe("barrier_nospec", 0600,
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powerpc_debugfs_root, NULL,
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&fops_barrier_nospec);
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return 0;
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}
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device_initcall(barrier_nospec_debugfs_init);
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static __init int security_feature_debugfs_init(void)
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{
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debugfs_create_x64("security_features", 0400, powerpc_debugfs_root,
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&powerpc_security_features);
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return 0;
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}
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device_initcall(security_feature_debugfs_init);
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#endif /* CONFIG_DEBUG_FS */
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#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
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static int __init handle_nospectre_v2(char *p)
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{
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no_spectrev2 = true;
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return 0;
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}
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early_param("nospectre_v2", handle_nospectre_v2);
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#endif /* CONFIG_PPC_FSL_BOOK3E || CONFIG_PPC_BOOK3S_64 */
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#ifdef CONFIG_PPC_FSL_BOOK3E
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void setup_spectre_v2(void)
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{
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if (no_spectrev2 || cpu_mitigations_off())
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do_btb_flush_fixups();
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else
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btb_flush_enabled = true;
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}
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#endif /* CONFIG_PPC_FSL_BOOK3E */
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#ifdef CONFIG_PPC_BOOK3S_64
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ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
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{
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bool thread_priv;
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thread_priv = security_ftr_enabled(SEC_FTR_L1D_THREAD_PRIV);
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if (rfi_flush) {
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struct seq_buf s;
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seq_buf_init(&s, buf, PAGE_SIZE - 1);
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seq_buf_printf(&s, "Mitigation: RFI Flush");
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if (thread_priv)
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seq_buf_printf(&s, ", L1D private per thread");
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seq_buf_printf(&s, "\n");
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return s.len;
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}
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if (thread_priv)
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return sprintf(buf, "Vulnerable: L1D private per thread\n");
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if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
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!security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
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return sprintf(buf, "Not affected\n");
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return sprintf(buf, "Vulnerable\n");
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}
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ssize_t cpu_show_l1tf(struct device *dev, struct device_attribute *attr, char *buf)
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{
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return cpu_show_meltdown(dev, attr, buf);
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}
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#endif
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ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)
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{
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struct seq_buf s;
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seq_buf_init(&s, buf, PAGE_SIZE - 1);
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if (security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR)) {
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if (barrier_nospec_enabled)
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seq_buf_printf(&s, "Mitigation: __user pointer sanitization");
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else
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seq_buf_printf(&s, "Vulnerable");
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if (security_ftr_enabled(SEC_FTR_SPEC_BAR_ORI31))
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seq_buf_printf(&s, ", ori31 speculation barrier enabled");
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seq_buf_printf(&s, "\n");
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} else
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seq_buf_printf(&s, "Not affected\n");
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return s.len;
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}
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ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf)
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{
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struct seq_buf s;
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bool bcs, ccd;
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seq_buf_init(&s, buf, PAGE_SIZE - 1);
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bcs = security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED);
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ccd = security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED);
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if (bcs || ccd) {
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seq_buf_printf(&s, "Mitigation: ");
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if (bcs)
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seq_buf_printf(&s, "Indirect branch serialisation (kernel only)");
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if (bcs && ccd)
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seq_buf_printf(&s, ", ");
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if (ccd)
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seq_buf_printf(&s, "Indirect branch cache disabled");
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} else if (count_cache_flush_type != BRANCH_CACHE_FLUSH_NONE) {
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seq_buf_printf(&s, "Mitigation: Software count cache flush");
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if (count_cache_flush_type == BRANCH_CACHE_FLUSH_HW)
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seq_buf_printf(&s, " (hardware accelerated)");
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} else if (btb_flush_enabled) {
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seq_buf_printf(&s, "Mitigation: Branch predictor state flush");
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} else {
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seq_buf_printf(&s, "Vulnerable");
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}
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if (bcs || ccd || count_cache_flush_type != BRANCH_CACHE_FLUSH_NONE) {
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if (link_stack_flush_type != BRANCH_CACHE_FLUSH_NONE)
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seq_buf_printf(&s, ", Software link stack flush");
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if (link_stack_flush_type == BRANCH_CACHE_FLUSH_HW)
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seq_buf_printf(&s, " (hardware accelerated)");
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}
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seq_buf_printf(&s, "\n");
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return s.len;
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}
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#ifdef CONFIG_PPC_BOOK3S_64
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/*
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* Store-forwarding barrier support.
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*/
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static enum stf_barrier_type stf_enabled_flush_types;
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static bool no_stf_barrier;
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static bool stf_barrier;
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static int __init handle_no_stf_barrier(char *p)
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{
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pr_info("stf-barrier: disabled on command line.");
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no_stf_barrier = true;
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return 0;
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}
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early_param("no_stf_barrier", handle_no_stf_barrier);
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/* This is the generic flag used by other architectures */
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static int __init handle_ssbd(char *p)
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{
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if (!p || strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) {
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/* Until firmware tells us, we have the barrier with auto */
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return 0;
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} else if (strncmp(p, "off", 3) == 0) {
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handle_no_stf_barrier(NULL);
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return 0;
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} else
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return 1;
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return 0;
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}
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early_param("spec_store_bypass_disable", handle_ssbd);
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/* This is the generic flag used by other architectures */
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static int __init handle_no_ssbd(char *p)
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{
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handle_no_stf_barrier(NULL);
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return 0;
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}
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early_param("nospec_store_bypass_disable", handle_no_ssbd);
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static void stf_barrier_enable(bool enable)
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{
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if (enable)
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do_stf_barrier_fixups(stf_enabled_flush_types);
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else
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do_stf_barrier_fixups(STF_BARRIER_NONE);
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stf_barrier = enable;
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}
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void setup_stf_barrier(void)
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{
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enum stf_barrier_type type;
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bool enable, hv;
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hv = cpu_has_feature(CPU_FTR_HVMODE);
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/* Default to fallback in case fw-features are not available */
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if (cpu_has_feature(CPU_FTR_ARCH_300))
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type = STF_BARRIER_EIEIO;
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else if (cpu_has_feature(CPU_FTR_ARCH_207S))
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type = STF_BARRIER_SYNC_ORI;
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else if (cpu_has_feature(CPU_FTR_ARCH_206))
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type = STF_BARRIER_FALLBACK;
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else
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type = STF_BARRIER_NONE;
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enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
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(security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) ||
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(security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv));
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if (type == STF_BARRIER_FALLBACK) {
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pr_info("stf-barrier: fallback barrier available\n");
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} else if (type == STF_BARRIER_SYNC_ORI) {
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pr_info("stf-barrier: hwsync barrier available\n");
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} else if (type == STF_BARRIER_EIEIO) {
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pr_info("stf-barrier: eieio barrier available\n");
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}
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stf_enabled_flush_types = type;
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if (!no_stf_barrier && !cpu_mitigations_off())
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stf_barrier_enable(enable);
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}
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ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
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{
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if (stf_barrier && stf_enabled_flush_types != STF_BARRIER_NONE) {
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const char *type;
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switch (stf_enabled_flush_types) {
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case STF_BARRIER_EIEIO:
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type = "eieio";
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break;
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case STF_BARRIER_SYNC_ORI:
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type = "hwsync";
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break;
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case STF_BARRIER_FALLBACK:
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type = "fallback";
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break;
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default:
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type = "unknown";
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}
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return sprintf(buf, "Mitigation: Kernel entry/exit barrier (%s)\n", type);
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}
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if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
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!security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
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return sprintf(buf, "Not affected\n");
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return sprintf(buf, "Vulnerable\n");
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}
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static int ssb_prctl_get(struct task_struct *task)
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{
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if (stf_enabled_flush_types == STF_BARRIER_NONE)
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/*
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* We don't have an explicit signal from firmware that we're
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* vulnerable or not, we only have certain CPU revisions that
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* are known to be vulnerable.
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*
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* We assume that if we're on another CPU, where the barrier is
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* NONE, then we are not vulnerable.
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*/
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return PR_SPEC_NOT_AFFECTED;
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else
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/*
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* If we do have a barrier type then we are vulnerable. The
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* barrier is not a global or per-process mitigation, so the
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* only value we can report here is PR_SPEC_ENABLE, which
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* appears as "vulnerable" in /proc.
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*/
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return PR_SPEC_ENABLE;
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return -EINVAL;
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}
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int arch_prctl_spec_ctrl_get(struct task_struct *task, unsigned long which)
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{
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switch (which) {
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case PR_SPEC_STORE_BYPASS:
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return ssb_prctl_get(task);
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default:
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return -ENODEV;
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}
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}
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#ifdef CONFIG_DEBUG_FS
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static int stf_barrier_set(void *data, u64 val)
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{
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bool enable;
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if (val == 1)
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enable = true;
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else if (val == 0)
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enable = false;
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else
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return -EINVAL;
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/* Only do anything if we're changing state */
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if (enable != stf_barrier)
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stf_barrier_enable(enable);
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return 0;
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}
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static int stf_barrier_get(void *data, u64 *val)
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{
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*val = stf_barrier ? 1 : 0;
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return 0;
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}
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DEFINE_DEBUGFS_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set,
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"%llu\n");
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static __init int stf_barrier_debugfs_init(void)
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{
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debugfs_create_file_unsafe("stf_barrier", 0600, powerpc_debugfs_root,
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NULL, &fops_stf_barrier);
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return 0;
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}
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device_initcall(stf_barrier_debugfs_init);
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#endif /* CONFIG_DEBUG_FS */
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static void update_branch_cache_flush(void)
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{
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u32 *site;
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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site = &patch__call_kvm_flush_link_stack;
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// This controls the branch from guest_exit_cont to kvm_flush_link_stack
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if (link_stack_flush_type == BRANCH_CACHE_FLUSH_NONE) {
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patch_instruction_site(site, ppc_inst(PPC_INST_NOP));
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} else {
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// Could use HW flush, but that could also flush count cache
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patch_branch_site(site, (u64)&kvm_flush_link_stack, BRANCH_SET_LINK);
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}
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#endif
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// Patch out the bcctr first, then nop the rest
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site = &patch__call_flush_branch_caches3;
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patch_instruction_site(site, ppc_inst(PPC_INST_NOP));
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site = &patch__call_flush_branch_caches2;
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patch_instruction_site(site, ppc_inst(PPC_INST_NOP));
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site = &patch__call_flush_branch_caches1;
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patch_instruction_site(site, ppc_inst(PPC_INST_NOP));
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// This controls the branch from _switch to flush_branch_caches
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if (count_cache_flush_type == BRANCH_CACHE_FLUSH_NONE &&
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link_stack_flush_type == BRANCH_CACHE_FLUSH_NONE) {
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// Nothing to be done
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} else if (count_cache_flush_type == BRANCH_CACHE_FLUSH_HW &&
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link_stack_flush_type == BRANCH_CACHE_FLUSH_HW) {
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// Patch in the bcctr last
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site = &patch__call_flush_branch_caches1;
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patch_instruction_site(site, ppc_inst(0x39207fff)); // li r9,0x7fff
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site = &patch__call_flush_branch_caches2;
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patch_instruction_site(site, ppc_inst(0x7d2903a6)); // mtctr r9
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site = &patch__call_flush_branch_caches3;
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patch_instruction_site(site, ppc_inst(PPC_INST_BCCTR_FLUSH));
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} else {
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patch_branch_site(site, (u64)&flush_branch_caches, BRANCH_SET_LINK);
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// If we just need to flush the link stack, early return
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if (count_cache_flush_type == BRANCH_CACHE_FLUSH_NONE) {
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patch_instruction_site(&patch__flush_link_stack_return,
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ppc_inst(PPC_INST_BLR));
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// If we have flush instruction, early return
|
|
} else if (count_cache_flush_type == BRANCH_CACHE_FLUSH_HW) {
|
|
patch_instruction_site(&patch__flush_count_cache_return,
|
|
ppc_inst(PPC_INST_BLR));
|
|
}
|
|
}
|
|
}
|
|
|
|
static void toggle_branch_cache_flush(bool enable)
|
|
{
|
|
if (!enable || !security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE)) {
|
|
if (count_cache_flush_type != BRANCH_CACHE_FLUSH_NONE)
|
|
count_cache_flush_type = BRANCH_CACHE_FLUSH_NONE;
|
|
|
|
pr_info("count-cache-flush: flush disabled.\n");
|
|
} else {
|
|
if (security_ftr_enabled(SEC_FTR_BCCTR_FLUSH_ASSIST)) {
|
|
count_cache_flush_type = BRANCH_CACHE_FLUSH_HW;
|
|
pr_info("count-cache-flush: hardware flush enabled.\n");
|
|
} else {
|
|
count_cache_flush_type = BRANCH_CACHE_FLUSH_SW;
|
|
pr_info("count-cache-flush: software flush enabled.\n");
|
|
}
|
|
}
|
|
|
|
if (!enable || !security_ftr_enabled(SEC_FTR_FLUSH_LINK_STACK)) {
|
|
if (link_stack_flush_type != BRANCH_CACHE_FLUSH_NONE)
|
|
link_stack_flush_type = BRANCH_CACHE_FLUSH_NONE;
|
|
|
|
pr_info("link-stack-flush: flush disabled.\n");
|
|
} else {
|
|
if (security_ftr_enabled(SEC_FTR_BCCTR_LINK_FLUSH_ASSIST)) {
|
|
link_stack_flush_type = BRANCH_CACHE_FLUSH_HW;
|
|
pr_info("link-stack-flush: hardware flush enabled.\n");
|
|
} else {
|
|
link_stack_flush_type = BRANCH_CACHE_FLUSH_SW;
|
|
pr_info("link-stack-flush: software flush enabled.\n");
|
|
}
|
|
}
|
|
|
|
update_branch_cache_flush();
|
|
}
|
|
|
|
void setup_count_cache_flush(void)
|
|
{
|
|
bool enable = true;
|
|
|
|
if (no_spectrev2 || cpu_mitigations_off()) {
|
|
if (security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED) ||
|
|
security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED))
|
|
pr_warn("Spectre v2 mitigations not fully under software control, can't disable\n");
|
|
|
|
enable = false;
|
|
}
|
|
|
|
/*
|
|
* There's no firmware feature flag/hypervisor bit to tell us we need to
|
|
* flush the link stack on context switch. So we set it here if we see
|
|
* either of the Spectre v2 mitigations that aim to protect userspace.
|
|
*/
|
|
if (security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED) ||
|
|
security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE))
|
|
security_ftr_set(SEC_FTR_FLUSH_LINK_STACK);
|
|
|
|
toggle_branch_cache_flush(enable);
|
|
}
|
|
|
|
static enum l1d_flush_type enabled_flush_types;
|
|
static void *l1d_flush_fallback_area;
|
|
static bool no_rfi_flush;
|
|
static bool no_entry_flush;
|
|
static bool no_uaccess_flush;
|
|
bool rfi_flush;
|
|
static bool entry_flush;
|
|
static bool uaccess_flush;
|
|
DEFINE_STATIC_KEY_FALSE(uaccess_flush_key);
|
|
EXPORT_SYMBOL(uaccess_flush_key);
|
|
|
|
static int __init handle_no_rfi_flush(char *p)
|
|
{
|
|
pr_info("rfi-flush: disabled on command line.");
|
|
no_rfi_flush = true;
|
|
return 0;
|
|
}
|
|
early_param("no_rfi_flush", handle_no_rfi_flush);
|
|
|
|
static int __init handle_no_entry_flush(char *p)
|
|
{
|
|
pr_info("entry-flush: disabled on command line.");
|
|
no_entry_flush = true;
|
|
return 0;
|
|
}
|
|
early_param("no_entry_flush", handle_no_entry_flush);
|
|
|
|
static int __init handle_no_uaccess_flush(char *p)
|
|
{
|
|
pr_info("uaccess-flush: disabled on command line.");
|
|
no_uaccess_flush = true;
|
|
return 0;
|
|
}
|
|
early_param("no_uaccess_flush", handle_no_uaccess_flush);
|
|
|
|
/*
|
|
* The RFI flush is not KPTI, but because users will see doco that says to use
|
|
* nopti we hijack that option here to also disable the RFI flush.
|
|
*/
|
|
static int __init handle_no_pti(char *p)
|
|
{
|
|
pr_info("rfi-flush: disabling due to 'nopti' on command line.\n");
|
|
handle_no_rfi_flush(NULL);
|
|
return 0;
|
|
}
|
|
early_param("nopti", handle_no_pti);
|
|
|
|
static void do_nothing(void *unused)
|
|
{
|
|
/*
|
|
* We don't need to do the flush explicitly, just enter+exit kernel is
|
|
* sufficient, the RFI exit handlers will do the right thing.
|
|
*/
|
|
}
|
|
|
|
void rfi_flush_enable(bool enable)
|
|
{
|
|
if (enable) {
|
|
do_rfi_flush_fixups(enabled_flush_types);
|
|
on_each_cpu(do_nothing, NULL, 1);
|
|
} else
|
|
do_rfi_flush_fixups(L1D_FLUSH_NONE);
|
|
|
|
rfi_flush = enable;
|
|
}
|
|
|
|
static void entry_flush_enable(bool enable)
|
|
{
|
|
if (enable) {
|
|
do_entry_flush_fixups(enabled_flush_types);
|
|
on_each_cpu(do_nothing, NULL, 1);
|
|
} else {
|
|
do_entry_flush_fixups(L1D_FLUSH_NONE);
|
|
}
|
|
|
|
entry_flush = enable;
|
|
}
|
|
|
|
static void uaccess_flush_enable(bool enable)
|
|
{
|
|
if (enable) {
|
|
do_uaccess_flush_fixups(enabled_flush_types);
|
|
static_branch_enable(&uaccess_flush_key);
|
|
on_each_cpu(do_nothing, NULL, 1);
|
|
} else {
|
|
static_branch_disable(&uaccess_flush_key);
|
|
do_uaccess_flush_fixups(L1D_FLUSH_NONE);
|
|
}
|
|
|
|
uaccess_flush = enable;
|
|
}
|
|
|
|
static void __ref init_fallback_flush(void)
|
|
{
|
|
u64 l1d_size, limit;
|
|
int cpu;
|
|
|
|
/* Only allocate the fallback flush area once (at boot time). */
|
|
if (l1d_flush_fallback_area)
|
|
return;
|
|
|
|
l1d_size = ppc64_caches.l1d.size;
|
|
|
|
/*
|
|
* If there is no d-cache-size property in the device tree, l1d_size
|
|
* could be zero. That leads to the loop in the asm wrapping around to
|
|
* 2^64-1, and then walking off the end of the fallback area and
|
|
* eventually causing a page fault which is fatal. Just default to
|
|
* something vaguely sane.
|
|
*/
|
|
if (!l1d_size)
|
|
l1d_size = (64 * 1024);
|
|
|
|
limit = min(ppc64_bolted_size(), ppc64_rma_size);
|
|
|
|
/*
|
|
* Align to L1d size, and size it at 2x L1d size, to catch possible
|
|
* hardware prefetch runoff. We don't have a recipe for load patterns to
|
|
* reliably avoid the prefetcher.
|
|
*/
|
|
l1d_flush_fallback_area = memblock_alloc_try_nid(l1d_size * 2,
|
|
l1d_size, MEMBLOCK_LOW_LIMIT,
|
|
limit, NUMA_NO_NODE);
|
|
if (!l1d_flush_fallback_area)
|
|
panic("%s: Failed to allocate %llu bytes align=0x%llx max_addr=%pa\n",
|
|
__func__, l1d_size * 2, l1d_size, &limit);
|
|
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
struct paca_struct *paca = paca_ptrs[cpu];
|
|
paca->rfi_flush_fallback_area = l1d_flush_fallback_area;
|
|
paca->l1d_flush_size = l1d_size;
|
|
}
|
|
}
|
|
|
|
void setup_rfi_flush(enum l1d_flush_type types, bool enable)
|
|
{
|
|
if (types & L1D_FLUSH_FALLBACK) {
|
|
pr_info("rfi-flush: fallback displacement flush available\n");
|
|
init_fallback_flush();
|
|
}
|
|
|
|
if (types & L1D_FLUSH_ORI)
|
|
pr_info("rfi-flush: ori type flush available\n");
|
|
|
|
if (types & L1D_FLUSH_MTTRIG)
|
|
pr_info("rfi-flush: mttrig type flush available\n");
|
|
|
|
enabled_flush_types = types;
|
|
|
|
if (!cpu_mitigations_off() && !no_rfi_flush)
|
|
rfi_flush_enable(enable);
|
|
}
|
|
|
|
void setup_entry_flush(bool enable)
|
|
{
|
|
if (cpu_mitigations_off())
|
|
return;
|
|
|
|
if (!no_entry_flush)
|
|
entry_flush_enable(enable);
|
|
}
|
|
|
|
void setup_uaccess_flush(bool enable)
|
|
{
|
|
if (cpu_mitigations_off())
|
|
return;
|
|
|
|
if (!no_uaccess_flush)
|
|
uaccess_flush_enable(enable);
|
|
}
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
static int count_cache_flush_set(void *data, u64 val)
|
|
{
|
|
bool enable;
|
|
|
|
if (val == 1)
|
|
enable = true;
|
|
else if (val == 0)
|
|
enable = false;
|
|
else
|
|
return -EINVAL;
|
|
|
|
toggle_branch_cache_flush(enable);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int count_cache_flush_get(void *data, u64 *val)
|
|
{
|
|
if (count_cache_flush_type == BRANCH_CACHE_FLUSH_NONE)
|
|
*val = 0;
|
|
else
|
|
*val = 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
DEFINE_DEBUGFS_ATTRIBUTE(fops_count_cache_flush, count_cache_flush_get,
|
|
count_cache_flush_set, "%llu\n");
|
|
|
|
static __init int count_cache_flush_debugfs_init(void)
|
|
{
|
|
debugfs_create_file_unsafe("count_cache_flush", 0600,
|
|
powerpc_debugfs_root, NULL,
|
|
&fops_count_cache_flush);
|
|
return 0;
|
|
}
|
|
device_initcall(count_cache_flush_debugfs_init);
|
|
|
|
static int rfi_flush_set(void *data, u64 val)
|
|
{
|
|
bool enable;
|
|
|
|
if (val == 1)
|
|
enable = true;
|
|
else if (val == 0)
|
|
enable = false;
|
|
else
|
|
return -EINVAL;
|
|
|
|
/* Only do anything if we're changing state */
|
|
if (enable != rfi_flush)
|
|
rfi_flush_enable(enable);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int rfi_flush_get(void *data, u64 *val)
|
|
{
|
|
*val = rfi_flush ? 1 : 0;
|
|
return 0;
|
|
}
|
|
|
|
DEFINE_SIMPLE_ATTRIBUTE(fops_rfi_flush, rfi_flush_get, rfi_flush_set, "%llu\n");
|
|
|
|
static int entry_flush_set(void *data, u64 val)
|
|
{
|
|
bool enable;
|
|
|
|
if (val == 1)
|
|
enable = true;
|
|
else if (val == 0)
|
|
enable = false;
|
|
else
|
|
return -EINVAL;
|
|
|
|
/* Only do anything if we're changing state */
|
|
if (enable != entry_flush)
|
|
entry_flush_enable(enable);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int entry_flush_get(void *data, u64 *val)
|
|
{
|
|
*val = entry_flush ? 1 : 0;
|
|
return 0;
|
|
}
|
|
|
|
DEFINE_SIMPLE_ATTRIBUTE(fops_entry_flush, entry_flush_get, entry_flush_set, "%llu\n");
|
|
|
|
static int uaccess_flush_set(void *data, u64 val)
|
|
{
|
|
bool enable;
|
|
|
|
if (val == 1)
|
|
enable = true;
|
|
else if (val == 0)
|
|
enable = false;
|
|
else
|
|
return -EINVAL;
|
|
|
|
/* Only do anything if we're changing state */
|
|
if (enable != uaccess_flush)
|
|
uaccess_flush_enable(enable);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int uaccess_flush_get(void *data, u64 *val)
|
|
{
|
|
*val = uaccess_flush ? 1 : 0;
|
|
return 0;
|
|
}
|
|
|
|
DEFINE_SIMPLE_ATTRIBUTE(fops_uaccess_flush, uaccess_flush_get, uaccess_flush_set, "%llu\n");
|
|
|
|
static __init int rfi_flush_debugfs_init(void)
|
|
{
|
|
debugfs_create_file("rfi_flush", 0600, powerpc_debugfs_root, NULL, &fops_rfi_flush);
|
|
debugfs_create_file("entry_flush", 0600, powerpc_debugfs_root, NULL, &fops_entry_flush);
|
|
debugfs_create_file("uaccess_flush", 0600, powerpc_debugfs_root, NULL, &fops_uaccess_flush);
|
|
return 0;
|
|
}
|
|
device_initcall(rfi_flush_debugfs_init);
|
|
#endif /* CONFIG_DEBUG_FS */
|
|
#endif /* CONFIG_PPC_BOOK3S_64 */
|