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a64e697cef
Base enablement patch to register performance monitoring hardware support for power10. Patch introduce the raw event encoding format, defines the supported list of events, config fields for the event attributes and their corresponding bit values which are exported via sysfs. Patch also enhances the support function in isa207_common.c to include power10 pmu hardware. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/1594996707-3727-9-git-send-email-atrajeev@linux.vnet.ibm.com
24 lines
807 B
Makefile
24 lines
807 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_PERF_EVENTS) += callchain.o callchain_$(BITS).o perf_regs.o
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ifdef CONFIG_COMPAT
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obj-$(CONFIG_PERF_EVENTS) += callchain_32.o
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endif
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obj-$(CONFIG_PPC_PERF_CTRS) += core-book3s.o bhrb.o
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obj64-$(CONFIG_PPC_PERF_CTRS) += ppc970-pmu.o power5-pmu.o \
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power5+-pmu.o power6-pmu.o power7-pmu.o \
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isa207-common.o power8-pmu.o power9-pmu.o \
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generic-compat-pmu.o power10-pmu.o
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obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o
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obj-$(CONFIG_PPC_POWERNV) += imc-pmu.o
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obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o
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obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o
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obj-$(CONFIG_HV_PERF_CTRS) += hv-24x7.o hv-gpci.o hv-common.o
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obj-$(CONFIG_PPC_8xx) += 8xx-pmu.o
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obj-$(CONFIG_PPC64) += $(obj64-y)
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obj-$(CONFIG_PPC32) += $(obj32-y)
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