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50f8d21863
HLSQ, SP and TP registers are only accessible from a special aperture and to make matters worse the aperture is blocked from the CPU on targets that can support secure rendering. Luckily the GPU hardware has its own purpose built register dumper that can access the registers from the aperture. Add a5xx specific code to program the crashdumper and retrieve the wayward registers and dump them for the crash state. Also, remove a block of registers the regular CPU accessible list that aren't useful for debug which helps reduce the size of the crash state file by a goodly amount. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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82 lines
2 KiB
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=====================
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MSM Crash Dump Format
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=====================
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Following a GPU hang the MSM driver outputs debugging information via
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/sys/kernel/dri/X/show or via devcoredump (/sys/class/devcoredump/dcdX/data).
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This document describes how the output is formatted.
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Each entry is in the form key: value. Sections headers will not have a value
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and all the contents of a section will be indented two spaces from the header.
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Each section might have multiple array entries the start of which is designated
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by a (-).
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Mappings
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--------
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kernel
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The kernel version that generated the dump (UTS_RELEASE).
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module
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The module that generated the crashdump.
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time
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The kernel time at crash formated as seconds.microseconds.
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comm
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Comm string for the binary that generated the fault.
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cmdline
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Command line for the binary that generated the fault.
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revision
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ID of the GPU that generated the crash formatted as
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core.major.minor.patchlevel separated by dots.
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rbbm-status
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The current value of RBBM_STATUS which shows what top level GPU
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components are in use at the time of crash.
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ringbuffer
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Section containing the contents of each ringbuffer. Each ringbuffer is
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identified with an id number.
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id
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Ringbuffer ID (0 based index). Each ringbuffer in the section
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will have its own unique id.
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iova
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GPU address of the ringbuffer.
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last-fence
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The last fence that was issued on the ringbuffer
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retired-fence
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The last fence retired on the ringbuffer.
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rptr
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The current read pointer (rptr) for the ringbuffer.
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wptr
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The current write pointer (wptr) for the ringbuffer.
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size
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Maximum size of the ringbuffer programmed in the hardware.
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data
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The contents of the ring encoded as ascii85. Only the used
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portions of the ring will be printed.
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registers
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Set of registers values. Each entry is on its own line enclosed
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by brackets { }.
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offset
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Byte offset of the register from the start of the
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GPU memory region.
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value
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Hexadecimal value of the register.
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registers-hlsq
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(5xx only) Register values from the HLSQ aperture.
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Same format as the register section.
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