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![Greg Kroah-Hartman](/assets/img/avatar_default.png)
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
327 lines
9.6 KiB
C
327 lines
9.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* cbe_regs.h
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*
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* This file is intended to hold the various register definitions for CBE
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* on-chip system devices (memory controller, IO controller, etc...)
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*
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* (C) Copyright IBM Corporation 2001,2006
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*
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* Authors: Maximino Aguilar (maguilar@us.ibm.com)
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* David J. Erb (djerb@us.ibm.com)
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*
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* (c) 2006 Benjamin Herrenschmidt <benh@kernel.crashing.org>, IBM Corp.
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*/
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#ifndef CBE_REGS_H
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#define CBE_REGS_H
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#include <asm/cell-pmu.h>
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/*
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*
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* Some HID register definitions
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*
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*/
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/* CBE specific HID0 bits */
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#define HID0_CBE_THERM_WAKEUP 0x0000020000000000ul
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#define HID0_CBE_SYSERR_WAKEUP 0x0000008000000000ul
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#define HID0_CBE_THERM_INT_EN 0x0000000400000000ul
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#define HID0_CBE_SYSERR_INT_EN 0x0000000200000000ul
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#define MAX_CBE 2
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/*
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*
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* Pervasive unit register definitions
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*
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*/
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union spe_reg {
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u64 val;
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u8 spe[8];
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};
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union ppe_spe_reg {
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u64 val;
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struct {
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u32 ppe;
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u32 spe;
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};
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};
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struct cbe_pmd_regs {
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/* Debug Bus Control */
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u64 pad_0x0000; /* 0x0000 */
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u64 group_control; /* 0x0008 */
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u8 pad_0x0010_0x00a8 [0x00a8 - 0x0010]; /* 0x0010 */
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u64 debug_bus_control; /* 0x00a8 */
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u8 pad_0x00b0_0x0100 [0x0100 - 0x00b0]; /* 0x00b0 */
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u64 trace_aux_data; /* 0x0100 */
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u64 trace_buffer_0_63; /* 0x0108 */
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u64 trace_buffer_64_127; /* 0x0110 */
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u64 trace_address; /* 0x0118 */
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u64 ext_tr_timer; /* 0x0120 */
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u8 pad_0x0128_0x0400 [0x0400 - 0x0128]; /* 0x0128 */
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/* Performance Monitor */
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u64 pm_status; /* 0x0400 */
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u64 pm_control; /* 0x0408 */
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u64 pm_interval; /* 0x0410 */
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u64 pm_ctr[4]; /* 0x0418 */
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u64 pm_start_stop; /* 0x0438 */
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u64 pm07_control[8]; /* 0x0440 */
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u8 pad_0x0480_0x0800 [0x0800 - 0x0480]; /* 0x0480 */
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/* Thermal Sensor Registers */
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union spe_reg ts_ctsr1; /* 0x0800 */
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u64 ts_ctsr2; /* 0x0808 */
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union spe_reg ts_mtsr1; /* 0x0810 */
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u64 ts_mtsr2; /* 0x0818 */
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union spe_reg ts_itr1; /* 0x0820 */
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u64 ts_itr2; /* 0x0828 */
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u64 ts_gitr; /* 0x0830 */
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u64 ts_isr; /* 0x0838 */
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u64 ts_imr; /* 0x0840 */
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union spe_reg tm_cr1; /* 0x0848 */
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u64 tm_cr2; /* 0x0850 */
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u64 tm_simr; /* 0x0858 */
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union ppe_spe_reg tm_tpr; /* 0x0860 */
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union spe_reg tm_str1; /* 0x0868 */
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u64 tm_str2; /* 0x0870 */
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union ppe_spe_reg tm_tsr; /* 0x0878 */
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/* Power Management */
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u64 pmcr; /* 0x0880 */
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#define CBE_PMD_PAUSE_ZERO_CONTROL 0x10000
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u64 pmsr; /* 0x0888 */
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/* Time Base Register */
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u64 tbr; /* 0x0890 */
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u8 pad_0x0898_0x0c00 [0x0c00 - 0x0898]; /* 0x0898 */
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/* Fault Isolation Registers */
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u64 checkstop_fir; /* 0x0c00 */
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u64 recoverable_fir; /* 0x0c08 */
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u64 spec_att_mchk_fir; /* 0x0c10 */
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u32 fir_mode_reg; /* 0x0c18 */
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u8 pad_0x0c1c_0x0c20 [4]; /* 0x0c1c */
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#define CBE_PMD_FIR_MODE_M8 0x00800
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u64 fir_enable_mask; /* 0x0c20 */
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u8 pad_0x0c28_0x0ca8 [0x0ca8 - 0x0c28]; /* 0x0c28 */
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u64 ras_esc_0; /* 0x0ca8 */
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u8 pad_0x0cb0_0x1000 [0x1000 - 0x0cb0]; /* 0x0cb0 */
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};
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extern struct cbe_pmd_regs __iomem *cbe_get_pmd_regs(struct device_node *np);
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extern struct cbe_pmd_regs __iomem *cbe_get_cpu_pmd_regs(int cpu);
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/*
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* PMU shadow registers
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*
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* Many of the registers in the performance monitoring unit are write-only,
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* so we need to save a copy of what we write to those registers.
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*
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* The actual data counters are read/write. However, writing to the counters
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* only takes effect if the PMU is enabled. Otherwise the value is stored in
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* a hardware latch until the next time the PMU is enabled. So we save a copy
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* of the counter values if we need to read them back while the PMU is
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* disabled. The counter_value_in_latch field is a bitmap indicating which
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* counters currently have a value waiting to be written.
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*/
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struct cbe_pmd_shadow_regs {
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u32 group_control;
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u32 debug_bus_control;
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u32 trace_address;
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u32 ext_tr_timer;
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u32 pm_status;
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u32 pm_control;
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u32 pm_interval;
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u32 pm_start_stop;
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u32 pm07_control[NR_CTRS];
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u32 pm_ctr[NR_PHYS_CTRS];
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u32 counter_value_in_latch;
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};
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extern struct cbe_pmd_shadow_regs *cbe_get_pmd_shadow_regs(struct device_node *np);
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extern struct cbe_pmd_shadow_regs *cbe_get_cpu_pmd_shadow_regs(int cpu);
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/*
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*
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* IIC unit register definitions
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*
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*/
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struct cbe_iic_pending_bits {
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u32 data;
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u8 flags;
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u8 class;
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u8 source;
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u8 prio;
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};
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#define CBE_IIC_IRQ_VALID 0x80
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#define CBE_IIC_IRQ_IPI 0x40
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struct cbe_iic_thread_regs {
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struct cbe_iic_pending_bits pending;
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struct cbe_iic_pending_bits pending_destr;
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u64 generate;
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u64 prio;
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};
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struct cbe_iic_regs {
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u8 pad_0x0000_0x0400[0x0400 - 0x0000]; /* 0x0000 */
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/* IIC interrupt registers */
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struct cbe_iic_thread_regs thread[2]; /* 0x0400 */
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u64 iic_ir; /* 0x0440 */
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#define CBE_IIC_IR_PRIO(x) (((x) & 0xf) << 12)
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#define CBE_IIC_IR_DEST_NODE(x) (((x) & 0xf) << 4)
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#define CBE_IIC_IR_DEST_UNIT(x) ((x) & 0xf)
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#define CBE_IIC_IR_IOC_0 0x0
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#define CBE_IIC_IR_IOC_1S 0xb
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#define CBE_IIC_IR_PT_0 0xe
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#define CBE_IIC_IR_PT_1 0xf
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u64 iic_is; /* 0x0448 */
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#define CBE_IIC_IS_PMI 0x2
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u8 pad_0x0450_0x0500[0x0500 - 0x0450]; /* 0x0450 */
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/* IOC FIR */
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u64 ioc_fir_reset; /* 0x0500 */
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u64 ioc_fir_set; /* 0x0508 */
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u64 ioc_checkstop_enable; /* 0x0510 */
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u64 ioc_fir_error_mask; /* 0x0518 */
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u64 ioc_syserr_enable; /* 0x0520 */
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u64 ioc_fir; /* 0x0528 */
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u8 pad_0x0530_0x1000[0x1000 - 0x0530]; /* 0x0530 */
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};
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extern struct cbe_iic_regs __iomem *cbe_get_iic_regs(struct device_node *np);
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extern struct cbe_iic_regs __iomem *cbe_get_cpu_iic_regs(int cpu);
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struct cbe_mic_tm_regs {
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u8 pad_0x0000_0x0040[0x0040 - 0x0000]; /* 0x0000 */
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u64 mic_ctl_cnfg2; /* 0x0040 */
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#define CBE_MIC_ENABLE_AUX_TRC 0x8000000000000000LL
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#define CBE_MIC_DISABLE_PWR_SAV_2 0x0200000000000000LL
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#define CBE_MIC_DISABLE_AUX_TRC_WRAP 0x0100000000000000LL
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#define CBE_MIC_ENABLE_AUX_TRC_INT 0x0080000000000000LL
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u64 pad_0x0048; /* 0x0048 */
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u64 mic_aux_trc_base; /* 0x0050 */
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u64 mic_aux_trc_max_addr; /* 0x0058 */
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u64 mic_aux_trc_cur_addr; /* 0x0060 */
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u64 mic_aux_trc_grf_addr; /* 0x0068 */
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u64 mic_aux_trc_grf_data; /* 0x0070 */
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u64 pad_0x0078; /* 0x0078 */
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u64 mic_ctl_cnfg_0; /* 0x0080 */
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#define CBE_MIC_DISABLE_PWR_SAV_0 0x8000000000000000LL
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u64 pad_0x0088; /* 0x0088 */
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u64 slow_fast_timer_0; /* 0x0090 */
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u64 slow_next_timer_0; /* 0x0098 */
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u8 pad_0x00a0_0x00f8[0x00f8 - 0x00a0]; /* 0x00a0 */
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u64 mic_df_ecc_address_0; /* 0x00f8 */
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u8 pad_0x0100_0x01b8[0x01b8 - 0x0100]; /* 0x0100 */
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u64 mic_df_ecc_address_1; /* 0x01b8 */
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u64 mic_ctl_cnfg_1; /* 0x01c0 */
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#define CBE_MIC_DISABLE_PWR_SAV_1 0x8000000000000000LL
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u64 pad_0x01c8; /* 0x01c8 */
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u64 slow_fast_timer_1; /* 0x01d0 */
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u64 slow_next_timer_1; /* 0x01d8 */
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u8 pad_0x01e0_0x0208[0x0208 - 0x01e0]; /* 0x01e0 */
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u64 mic_exc; /* 0x0208 */
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#define CBE_MIC_EXC_BLOCK_SCRUB 0x0800000000000000ULL
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#define CBE_MIC_EXC_FAST_SCRUB 0x0100000000000000ULL
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u64 mic_mnt_cfg; /* 0x0210 */
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#define CBE_MIC_MNT_CFG_CHAN_0_POP 0x0002000000000000ULL
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#define CBE_MIC_MNT_CFG_CHAN_1_POP 0x0004000000000000ULL
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u64 mic_df_config; /* 0x0218 */
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#define CBE_MIC_ECC_DISABLE_0 0x4000000000000000ULL
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#define CBE_MIC_ECC_REP_SINGLE_0 0x2000000000000000ULL
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#define CBE_MIC_ECC_DISABLE_1 0x0080000000000000ULL
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#define CBE_MIC_ECC_REP_SINGLE_1 0x0040000000000000ULL
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u8 pad_0x0220_0x0230[0x0230 - 0x0220]; /* 0x0220 */
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u64 mic_fir; /* 0x0230 */
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#define CBE_MIC_FIR_ECC_SINGLE_0_ERR 0x0200000000000000ULL
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#define CBE_MIC_FIR_ECC_MULTI_0_ERR 0x0100000000000000ULL
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#define CBE_MIC_FIR_ECC_SINGLE_1_ERR 0x0080000000000000ULL
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#define CBE_MIC_FIR_ECC_MULTI_1_ERR 0x0040000000000000ULL
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#define CBE_MIC_FIR_ECC_ERR_MASK 0xffff000000000000ULL
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#define CBE_MIC_FIR_ECC_SINGLE_0_CTE 0x0000020000000000ULL
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#define CBE_MIC_FIR_ECC_MULTI_0_CTE 0x0000010000000000ULL
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#define CBE_MIC_FIR_ECC_SINGLE_1_CTE 0x0000008000000000ULL
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#define CBE_MIC_FIR_ECC_MULTI_1_CTE 0x0000004000000000ULL
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#define CBE_MIC_FIR_ECC_CTE_MASK 0x0000ffff00000000ULL
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#define CBE_MIC_FIR_ECC_SINGLE_0_RESET 0x0000000002000000ULL
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#define CBE_MIC_FIR_ECC_MULTI_0_RESET 0x0000000001000000ULL
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#define CBE_MIC_FIR_ECC_SINGLE_1_RESET 0x0000000000800000ULL
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#define CBE_MIC_FIR_ECC_MULTI_1_RESET 0x0000000000400000ULL
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#define CBE_MIC_FIR_ECC_RESET_MASK 0x00000000ffff0000ULL
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#define CBE_MIC_FIR_ECC_SINGLE_0_SET 0x0000000000000200ULL
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#define CBE_MIC_FIR_ECC_MULTI_0_SET 0x0000000000000100ULL
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#define CBE_MIC_FIR_ECC_SINGLE_1_SET 0x0000000000000080ULL
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#define CBE_MIC_FIR_ECC_MULTI_1_SET 0x0000000000000040ULL
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#define CBE_MIC_FIR_ECC_SET_MASK 0x000000000000ffffULL
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u64 mic_fir_debug; /* 0x0238 */
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u8 pad_0x0240_0x1000[0x1000 - 0x0240]; /* 0x0240 */
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};
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extern struct cbe_mic_tm_regs __iomem *cbe_get_mic_tm_regs(struct device_node *np);
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extern struct cbe_mic_tm_regs __iomem *cbe_get_cpu_mic_tm_regs(int cpu);
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/* Cell page table entries */
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#define CBE_IOPTE_PP_W 0x8000000000000000ul /* protection: write */
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#define CBE_IOPTE_PP_R 0x4000000000000000ul /* protection: read */
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#define CBE_IOPTE_M 0x2000000000000000ul /* coherency required */
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#define CBE_IOPTE_SO_R 0x1000000000000000ul /* ordering: writes */
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#define CBE_IOPTE_SO_RW 0x1800000000000000ul /* ordering: r & w */
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#define CBE_IOPTE_RPN_Mask 0x07fffffffffff000ul /* RPN */
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#define CBE_IOPTE_H 0x0000000000000800ul /* cache hint */
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#define CBE_IOPTE_IOID_Mask 0x00000000000007fful /* ioid */
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/* some utility functions to deal with SMT */
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extern u32 cbe_get_hw_thread_id(int cpu);
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extern u32 cbe_cpu_to_node(int cpu);
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extern u32 cbe_node_to_cpu(int node);
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/* Init this module early */
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extern void cbe_regs_init(void);
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#endif /* CBE_REGS_H */
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