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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 of the license this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 15 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190530000437.052642892@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
74 lines
1.9 KiB
C
74 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* PS3 GPU declarations.
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*
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* Copyright 2009 Sony Corporation
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*/
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#ifndef _ASM_POWERPC_PS3GPU_H
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#define _ASM_POWERPC_PS3GPU_H
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#include <linux/mutex.h>
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#include <asm/lv1call.h>
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#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x101
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#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x102
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#define L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP 0x600
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#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
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#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT_SYNC 0x602
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#define L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE 0x603
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#define L1GPU_FB_BLIT_WAIT_FOR_COMPLETION (1ULL << 32)
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#define L1GPU_DISPLAY_SYNC_HSYNC 1
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#define L1GPU_DISPLAY_SYNC_VSYNC 2
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/* mutex synchronizing GPU accesses and video mode changes */
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extern struct mutex ps3_gpu_mutex;
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static inline int lv1_gpu_display_sync(u64 context_handle, u64 head,
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u64 ddr_offset)
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{
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return lv1_gpu_context_attribute(context_handle,
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L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC,
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head, ddr_offset, 0, 0);
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}
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static inline int lv1_gpu_display_flip(u64 context_handle, u64 head,
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u64 ddr_offset)
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{
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return lv1_gpu_context_attribute(context_handle,
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L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP,
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head, ddr_offset, 0, 0);
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}
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static inline int lv1_gpu_fb_setup(u64 context_handle, u64 xdr_lpar,
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u64 xdr_size, u64 ioif_offset)
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{
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return lv1_gpu_context_attribute(context_handle,
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L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP,
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xdr_lpar, xdr_size, ioif_offset, 0);
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}
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static inline int lv1_gpu_fb_blit(u64 context_handle, u64 ddr_offset,
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u64 ioif_offset, u64 sync_width, u64 pitch)
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{
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return lv1_gpu_context_attribute(context_handle,
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L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
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ddr_offset, ioif_offset, sync_width,
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pitch);
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}
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static inline int lv1_gpu_fb_close(u64 context_handle)
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{
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return lv1_gpu_context_attribute(context_handle,
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L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE, 0,
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0, 0, 0);
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}
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#endif /* _ASM_POWERPC_PS3GPU_H */
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