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05504b4256
The copy buffer is implemented as a real address in the nest which is translated from EA by copy, and used for memory access by paste. This requires that it be invalidated by TLB invalidation. TLBIE does invalidate the copy buffer, but TLBIEL does not. Add cp_abort to the tlbiel sequence. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [mpe: Fixup whitespace and comment formatting] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200916030234.4110379-2-npiggin@gmail.com
70 lines
2 KiB
C
70 lines
2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_POWERPC_SYNCH_H
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#define _ASM_POWERPC_SYNCH_H
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#ifdef __KERNEL__
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#include <asm/cputable.h>
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#include <asm/feature-fixups.h>
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#include <asm/ppc-opcode.h>
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#ifndef __ASSEMBLY__
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extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup;
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extern void do_lwsync_fixups(unsigned long value, void *fixup_start,
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void *fixup_end);
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static inline void eieio(void)
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{
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__asm__ __volatile__ ("eieio" : : : "memory");
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}
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static inline void isync(void)
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{
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__asm__ __volatile__ ("isync" : : : "memory");
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}
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static inline void ppc_after_tlbiel_barrier(void)
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{
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asm volatile("ptesync": : :"memory");
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/*
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* POWER9, POWER10 need a cp_abort after tlbiel to ensure the copy is
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* invalidated correctly. If this is not done, the paste can take data
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* from the physical address that was translated at copy time.
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*
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* POWER9 in practice does not need this, because address spaces with
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* accelerators mapped will use tlbie (which does invalidate the copy)
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* to invalidate translations. It's not possible to limit POWER10 this
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* way due to local copy-paste.
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*/
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asm volatile(ASM_FTR_IFSET(PPC_CP_ABORT, "", %0) : : "i" (CPU_FTR_ARCH_31) : "memory");
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}
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#endif /* __ASSEMBLY__ */
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#if defined(__powerpc64__)
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# define LWSYNC lwsync
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#elif defined(CONFIG_E500)
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# define LWSYNC \
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START_LWSYNC_SECTION(96); \
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sync; \
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MAKE_LWSYNC_SECTION_ENTRY(96, __lwsync_fixup);
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#else
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# define LWSYNC sync
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#endif
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#ifdef CONFIG_SMP
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#define __PPC_ACQUIRE_BARRIER \
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START_LWSYNC_SECTION(97); \
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isync; \
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MAKE_LWSYNC_SECTION_ENTRY(97, __lwsync_fixup);
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#define PPC_ACQUIRE_BARRIER "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER)
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#define PPC_RELEASE_BARRIER stringify_in_c(LWSYNC) "\n"
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#define PPC_ATOMIC_ENTRY_BARRIER "\n" stringify_in_c(sync) "\n"
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#define PPC_ATOMIC_EXIT_BARRIER "\n" stringify_in_c(sync) "\n"
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#else
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#define PPC_ACQUIRE_BARRIER
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#define PPC_RELEASE_BARRIER
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#define PPC_ATOMIC_ENTRY_BARRIER
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#define PPC_ATOMIC_EXIT_BARRIER
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#endif
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_SYNCH_H */
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