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![Shane Huang](/assets/img/avatar_default.png)
The locations of SMBus register base address and enablement bit are changed from AMD ML, which need this patch to be supported. Signed-off-by: Shane Huang <shane.huang@amd.com> Reviewed-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@vger.kernel.org
110 lines
4.7 KiB
Text
110 lines
4.7 KiB
Text
Kernel driver i2c-piix4
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Supported adapters:
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* Intel 82371AB PIIX4 and PIIX4E
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* Intel 82443MX (440MX)
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Datasheet: Publicly available at the Intel website
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* ServerWorks OSB4, CSB5, CSB6, HT-1000 and HT-1100 southbridges
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Datasheet: Only available via NDA from ServerWorks
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* ATI IXP200, IXP300, IXP400, SB600, SB700 and SB800 southbridges
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Datasheet: Not publicly available
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SB700 register reference available at:
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http://support.amd.com/us/Embedded_TechDocs/43009_sb7xx_rrg_pub_1.00.pdf
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* AMD SP5100 (SB700 derivative found on some server mainboards)
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Datasheet: Publicly available at the AMD website
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http://support.amd.com/us/Embedded_TechDocs/44413.pdf
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* AMD Hudson-2, ML, CZ
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Datasheet: Not publicly available
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* Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
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Datasheet: Publicly available at the SMSC website http://www.smsc.com
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Authors:
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Frodo Looijaard <frodol@dds.nl>
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Philip Edelbrock <phil@netroedge.com>
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Module Parameters
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-----------------
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* force: int
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Forcibly enable the PIIX4. DANGEROUS!
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* force_addr: int
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Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS!
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Description
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-----------
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The PIIX4 (properly known as the 82371AB) is an Intel chip with a lot of
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functionality. Among other things, it implements the PCI bus. One of its
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minor functions is implementing a System Management Bus. This is a true
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SMBus - you can not access it on I2C levels. The good news is that it
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natively understands SMBus commands and you do not have to worry about
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timing problems. The bad news is that non-SMBus devices connected to it can
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confuse it mightily. Yes, this is known to happen...
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Do 'lspci -v' and see whether it contains an entry like this:
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0000:00:02.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 02)
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Flags: medium devsel, IRQ 9
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Bus and device numbers may differ, but the function number must be
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identical (like many PCI devices, the PIIX4 incorporates a number of
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different 'functions', which can be considered as separate devices). If you
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find such an entry, you have a PIIX4 SMBus controller.
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On some computers (most notably, some Dells), the SMBus is disabled by
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default. If you use the insmod parameter 'force=1', the kernel module will
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try to enable it. THIS IS VERY DANGEROUS! If the BIOS did not set up a
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correct address for this module, you could get in big trouble (read:
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crashes, data corruption, etc.). Try this only as a last resort (try BIOS
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updates first, for example), and backup first! An even more dangerous
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option is 'force_addr=<IOPORT>'. This will not only enable the PIIX4 like
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'force' foes, but it will also set a new base I/O port address. The SMBus
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parts of the PIIX4 needs a range of 8 of these addresses to function
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correctly. If these addresses are already reserved by some other device,
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you will get into big trouble! DON'T USE THIS IF YOU ARE NOT VERY SURE
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ABOUT WHAT YOU ARE DOING!
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The PIIX4E is just an new version of the PIIX4; it is supported as well.
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The PIIX/PIIX3 does not implement an SMBus or I2C bus, so you can't use
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this driver on those mainboards.
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The ServerWorks Southbridges, the Intel 440MX, and the Victory66 are
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identical to the PIIX4 in I2C/SMBus support.
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The AMD SB700, SB800, SP5100 and Hudson-2 chipsets implement two
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PIIX4-compatible SMBus controllers. If your BIOS initializes the
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secondary controller, it will be detected by this driver as
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an "Auxiliary SMBus Host Controller".
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If you own Force CPCI735 motherboard or other OSB4 based systems you may need
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to change the SMBus Interrupt Select register so the SMBus controller uses
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the SMI mode.
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1) Use lspci command and locate the PCI device with the SMBus controller:
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00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f)
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The line may vary for different chipsets. Please consult the driver source
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for all possible PCI ids (and lspci -n to match them). Lets assume the
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device is located at 00:0f.0.
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2) Now you just need to change the value in 0xD2 register. Get it first with
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command: lspci -xxx -s 00:0f.0
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If the value is 0x3 then you need to change it to 0x1
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setpci -s 00:0f.0 d2.b=1
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Please note that you don't need to do that in all cases, just when the SMBus is
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not working properly.
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Hardware-specific issues
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------------------------
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This driver will refuse to load on IBM systems with an Intel PIIX4 SMBus.
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Some of these machines have an RFID EEPROM (24RF08) connected to the SMBus,
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which can easily get corrupted due to a state machine bug. These are mostly
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Thinkpad laptops, but desktop systems may also be affected. We have no list
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of all affected systems, so the only safe solution was to prevent access to
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the SMBus on all IBM systems (detected using DMI data.)
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For additional information, read:
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http://www.lm-sensors.org/browser/lm-sensors/trunk/README
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