Jason Gunthorpe 425902f5c8 fpga zynq: Use the scatterlist interface ... This allows the driver to avoid a high order coherent DMA allocation and memory copy. With this patch it can DMA directly from the kernel pages that the bitfile is stored in. Since this is now a gather DMA operation the driver uses the ISR to feed the chips DMA queue with each entry from the SGL. Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Acked-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2017-02-10 15:20:44 +01:00
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altera-fpga2sdram.c
altera-freeze-bridge.c
altera-hps2fpga.c
fpga-bridge.c
fpga-mgr.c
fpga-region.c
Kconfig
Makefile
socfpga-a10.c
socfpga.c
zynq-fpga.c