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aa32a955ae
The CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores. Join some lines back together. This makes some of them exceed 80 columns, but they are uninteresting and this unclutters things. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1668/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
174 lines
5.2 KiB
C
174 lines
5.2 KiB
C
/***********************license start***************
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* Author: Cavium Networks
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*
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* Contact: support@caviumnetworks.com
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* This file is part of the OCTEON SDK
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*
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* Copyright (c) 2003-2010 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful, but
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* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
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* NONINFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this file; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* or visit http://www.gnu.org/licenses/.
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*
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* This file may also be available under a different license from Cavium.
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* Contact Cavium Networks for more information
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***********************license end**************************************/
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#ifndef __CVMX_SMIX_DEFS_H__
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#define __CVMX_SMIX_DEFS_H__
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#define CVMX_SMIX_CLK(offset) (CVMX_ADD_IO_SEG(0x0001180000001818ull) + ((offset) & 1) * 256)
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#define CVMX_SMIX_CMD(offset) (CVMX_ADD_IO_SEG(0x0001180000001800ull) + ((offset) & 1) * 256)
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#define CVMX_SMIX_EN(offset) (CVMX_ADD_IO_SEG(0x0001180000001820ull) + ((offset) & 1) * 256)
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#define CVMX_SMIX_RD_DAT(offset) (CVMX_ADD_IO_SEG(0x0001180000001810ull) + ((offset) & 1) * 256)
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#define CVMX_SMIX_WR_DAT(offset) (CVMX_ADD_IO_SEG(0x0001180000001808ull) + ((offset) & 1) * 256)
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union cvmx_smix_clk {
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uint64_t u64;
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struct cvmx_smix_clk_s {
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uint64_t reserved_25_63:39;
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uint64_t mode:1;
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uint64_t reserved_21_23:3;
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uint64_t sample_hi:5;
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uint64_t sample_mode:1;
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uint64_t reserved_14_14:1;
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uint64_t clk_idle:1;
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uint64_t preamble:1;
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uint64_t sample:4;
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uint64_t phase:8;
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} s;
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struct cvmx_smix_clk_cn30xx {
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uint64_t reserved_21_63:43;
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uint64_t sample_hi:5;
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uint64_t sample_mode:1;
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uint64_t reserved_14_14:1;
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uint64_t clk_idle:1;
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uint64_t preamble:1;
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uint64_t sample:4;
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uint64_t phase:8;
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} cn30xx;
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struct cvmx_smix_clk_cn30xx cn31xx;
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struct cvmx_smix_clk_cn30xx cn38xx;
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struct cvmx_smix_clk_cn30xx cn38xxp2;
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struct cvmx_smix_clk_s cn50xx;
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struct cvmx_smix_clk_s cn52xx;
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struct cvmx_smix_clk_s cn52xxp1;
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struct cvmx_smix_clk_s cn56xx;
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struct cvmx_smix_clk_s cn56xxp1;
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struct cvmx_smix_clk_cn30xx cn58xx;
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struct cvmx_smix_clk_cn30xx cn58xxp1;
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struct cvmx_smix_clk_s cn63xx;
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struct cvmx_smix_clk_s cn63xxp1;
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};
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union cvmx_smix_cmd {
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uint64_t u64;
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struct cvmx_smix_cmd_s {
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uint64_t reserved_18_63:46;
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uint64_t phy_op:2;
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uint64_t reserved_13_15:3;
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uint64_t phy_adr:5;
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uint64_t reserved_5_7:3;
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uint64_t reg_adr:5;
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} s;
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struct cvmx_smix_cmd_cn30xx {
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uint64_t reserved_17_63:47;
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uint64_t phy_op:1;
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uint64_t reserved_13_15:3;
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uint64_t phy_adr:5;
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uint64_t reserved_5_7:3;
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uint64_t reg_adr:5;
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} cn30xx;
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struct cvmx_smix_cmd_cn30xx cn31xx;
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struct cvmx_smix_cmd_cn30xx cn38xx;
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struct cvmx_smix_cmd_cn30xx cn38xxp2;
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struct cvmx_smix_cmd_s cn50xx;
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struct cvmx_smix_cmd_s cn52xx;
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struct cvmx_smix_cmd_s cn52xxp1;
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struct cvmx_smix_cmd_s cn56xx;
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struct cvmx_smix_cmd_s cn56xxp1;
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struct cvmx_smix_cmd_cn30xx cn58xx;
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struct cvmx_smix_cmd_cn30xx cn58xxp1;
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struct cvmx_smix_cmd_s cn63xx;
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struct cvmx_smix_cmd_s cn63xxp1;
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};
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union cvmx_smix_en {
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uint64_t u64;
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struct cvmx_smix_en_s {
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uint64_t reserved_1_63:63;
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uint64_t en:1;
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} s;
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struct cvmx_smix_en_s cn30xx;
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struct cvmx_smix_en_s cn31xx;
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struct cvmx_smix_en_s cn38xx;
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struct cvmx_smix_en_s cn38xxp2;
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struct cvmx_smix_en_s cn50xx;
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struct cvmx_smix_en_s cn52xx;
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struct cvmx_smix_en_s cn52xxp1;
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struct cvmx_smix_en_s cn56xx;
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struct cvmx_smix_en_s cn56xxp1;
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struct cvmx_smix_en_s cn58xx;
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struct cvmx_smix_en_s cn58xxp1;
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struct cvmx_smix_en_s cn63xx;
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struct cvmx_smix_en_s cn63xxp1;
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};
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union cvmx_smix_rd_dat {
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uint64_t u64;
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struct cvmx_smix_rd_dat_s {
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uint64_t reserved_18_63:46;
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uint64_t pending:1;
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uint64_t val:1;
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uint64_t dat:16;
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} s;
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struct cvmx_smix_rd_dat_s cn30xx;
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struct cvmx_smix_rd_dat_s cn31xx;
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struct cvmx_smix_rd_dat_s cn38xx;
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struct cvmx_smix_rd_dat_s cn38xxp2;
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struct cvmx_smix_rd_dat_s cn50xx;
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struct cvmx_smix_rd_dat_s cn52xx;
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struct cvmx_smix_rd_dat_s cn52xxp1;
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struct cvmx_smix_rd_dat_s cn56xx;
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struct cvmx_smix_rd_dat_s cn56xxp1;
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struct cvmx_smix_rd_dat_s cn58xx;
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struct cvmx_smix_rd_dat_s cn58xxp1;
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struct cvmx_smix_rd_dat_s cn63xx;
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struct cvmx_smix_rd_dat_s cn63xxp1;
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};
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union cvmx_smix_wr_dat {
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uint64_t u64;
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struct cvmx_smix_wr_dat_s {
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uint64_t reserved_18_63:46;
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uint64_t pending:1;
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uint64_t val:1;
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uint64_t dat:16;
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} s;
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struct cvmx_smix_wr_dat_s cn30xx;
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struct cvmx_smix_wr_dat_s cn31xx;
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struct cvmx_smix_wr_dat_s cn38xx;
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struct cvmx_smix_wr_dat_s cn38xxp2;
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struct cvmx_smix_wr_dat_s cn50xx;
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struct cvmx_smix_wr_dat_s cn52xx;
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struct cvmx_smix_wr_dat_s cn52xxp1;
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struct cvmx_smix_wr_dat_s cn56xx;
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struct cvmx_smix_wr_dat_s cn56xxp1;
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struct cvmx_smix_wr_dat_s cn58xx;
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struct cvmx_smix_wr_dat_s cn58xxp1;
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struct cvmx_smix_wr_dat_s cn63xx;
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struct cvmx_smix_wr_dat_s cn63xxp1;
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};
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#endif
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