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The ZynqMP includes the DisplayPort subsystem with its own DMA engine called DPDMA. The DPDMA IP comes with 6 individual channels (4 for display, 2 for audio). This documentation describes DT bindings of DPDMA. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200717013337.24122-2-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
16 lines
466 B
C
16 lines
466 B
C
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
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/*
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* Copyright 2019 Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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*/
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#ifndef __DT_BINDINGS_DMA_XLNX_ZYNQMP_DPDMA_H__
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#define __DT_BINDINGS_DMA_XLNX_ZYNQMP_DPDMA_H__
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#define ZYNQMP_DPDMA_VIDEO0 0
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#define ZYNQMP_DPDMA_VIDEO1 1
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#define ZYNQMP_DPDMA_VIDEO2 2
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#define ZYNQMP_DPDMA_GRAPHICS 3
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#define ZYNQMP_DPDMA_AUDIO0 4
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#define ZYNQMP_DPDMA_AUDIO1 5
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#endif /* __DT_BINDINGS_DMA_XLNX_ZYNQMP_DPDMA_H__ */
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