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905e75c46d
We unified the Freescale pci/pcie initialization by changing the fsl_pci to a platform driver. In previous PCI code architecture the initialization routine is called at board_setup_arch stage. Now the initialization is done in probe function which is architectural better. Also It's convenient for adding PM support for PCI controller in later patch. Now we registered pci controllers as platform devices. So we combine two initialization code as one platform driver. Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
245 lines
5.7 KiB
C
245 lines
5.7 KiB
C
/*
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* MPC85xx DS Board Setup
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*
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* Author Xianghua Xiao (x.xiao@freescale.com)
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* Roy Zang <tie-fei.zang@freescale.com>
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* - Add PCI/PCI Exprees support
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* Copyright 2007 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/interrupt.h>
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#include <linux/of_platform.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <mm/mmu_decl.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include <asm/i8259.h>
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#include <asm/swiotlb.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "smp.h"
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#include "mpc85xx.h"
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
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#else
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#define DBG(fmt, args...)
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#endif
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#ifdef CONFIG_PPC_I8259
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static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_desc_get_chip(desc);
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unsigned int cascade_irq = i8259_irq();
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if (cascade_irq != NO_IRQ) {
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generic_handle_irq(cascade_irq);
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}
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chip->irq_eoi(&desc->irq_data);
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}
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#endif /* CONFIG_PPC_I8259 */
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void __init mpc85xx_ds_pic_init(void)
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{
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struct mpic *mpic;
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#ifdef CONFIG_PPC_I8259
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struct device_node *np;
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struct device_node *cascade_node = NULL;
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int cascade_irq;
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#endif
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unsigned long root = of_get_flat_dt_root();
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if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
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mpic = mpic_alloc(NULL, 0,
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MPIC_NO_RESET |
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MPIC_BIG_ENDIAN |
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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} else {
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mpic = mpic_alloc(NULL, 0,
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MPIC_BIG_ENDIAN |
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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}
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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#ifdef CONFIG_PPC_I8259
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/* Initialize the i8259 controller */
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for_each_node_by_type(np, "interrupt-controller")
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if (of_device_is_compatible(np, "chrp,iic")) {
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cascade_node = np;
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break;
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}
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if (cascade_node == NULL) {
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printk(KERN_DEBUG "Could not find i8259 PIC\n");
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return;
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}
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cascade_irq = irq_of_parse_and_map(cascade_node, 0);
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if (cascade_irq == NO_IRQ) {
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printk(KERN_ERR "Failed to map cascade interrupt\n");
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return;
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}
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DBG("mpc85xxds: cascade mapped to irq %d\n", cascade_irq);
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i8259_init(cascade_node, 0);
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of_node_put(cascade_node);
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irq_set_chained_handler(cascade_irq, mpc85xx_8259_cascade);
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#endif /* CONFIG_PPC_I8259 */
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}
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#ifdef CONFIG_PCI
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extern int uli_exclude_device(struct pci_controller *hose,
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u_char bus, u_char devfn);
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static struct device_node *pci_with_uli;
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static int mpc85xx_exclude_device(struct pci_controller *hose,
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u_char bus, u_char devfn)
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{
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if (hose->dn == pci_with_uli)
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return uli_exclude_device(hose, bus, devfn);
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return PCIBIOS_SUCCESSFUL;
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}
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#endif /* CONFIG_PCI */
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static void __init mpc85xx_ds_uli_init(void)
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{
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#ifdef CONFIG_PCI
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struct device_node *node;
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/* See if we have a ULI under the primary */
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node = of_find_node_by_name(NULL, "uli1575");
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while ((pci_with_uli = of_get_parent(node))) {
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of_node_put(node);
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node = pci_with_uli;
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if (pci_with_uli == fsl_pci_primary) {
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ppc_md.pci_exclude_device = mpc85xx_exclude_device;
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break;
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}
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}
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#endif
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}
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/*
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* Setup the architecture
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*/
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static void __init mpc85xx_ds_setup_arch(void)
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{
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if (ppc_md.progress)
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ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
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swiotlb_detect_4g();
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fsl_pci_assign_primary();
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mpc85xx_ds_uli_init();
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mpc85xx_smp_init();
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printk("MPC85xx DS board from Freescale Semiconductor\n");
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}
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init mpc8544_ds_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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return !!of_flat_dt_is_compatible(root, "MPC8544DS");
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}
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machine_arch_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
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machine_arch_initcall(mpc8572_ds, mpc85xx_common_publish_devices);
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machine_arch_initcall(p2020_ds, mpc85xx_common_publish_devices);
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machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier);
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machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier);
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machine_arch_initcall(p2020_ds, swiotlb_setup_bus_notifier);
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init mpc8572_ds_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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return !!of_flat_dt_is_compatible(root, "fsl,MPC8572DS");
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}
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init p2020_ds_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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return !!of_flat_dt_is_compatible(root, "fsl,P2020DS");
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}
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define_machine(mpc8544_ds) {
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.name = "MPC8544 DS",
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.probe = mpc8544_ds_probe,
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.setup_arch = mpc85xx_ds_setup_arch,
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.init_IRQ = mpc85xx_ds_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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.get_irq = mpic_get_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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define_machine(mpc8572_ds) {
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.name = "MPC8572 DS",
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.probe = mpc8572_ds_probe,
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.setup_arch = mpc85xx_ds_setup_arch,
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.init_IRQ = mpc85xx_ds_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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.get_irq = mpic_get_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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define_machine(p2020_ds) {
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.name = "P2020 DS",
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.probe = p2020_ds_probe,
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.setup_arch = mpc85xx_ds_setup_arch,
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.init_IRQ = mpc85xx_ds_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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.get_irq = mpic_get_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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