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![Fabien Parent](/assets/img/avatar_default.png)
Add routing table for DSI on MT8167 SoC. The registers are mostly incompatible with the current defines, so new one for MT8167 are added. Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20210405200354.2194930-2-fparent@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
35 lines
1.2 KiB
C
35 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __SOC_MEDIATEK_MT8167_MMSYS_H
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#define __SOC_MEDIATEK_MT8167_MMSYS_H
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#define MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN 0x030
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#define MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN 0x038
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#define MT8167_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN 0x058
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#define MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN 0x064
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#define MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN 0x06c
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#define MT8167_DITHER_MOUT_EN_RDMA0 0x1
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#define MT8167_RDMA0_SOUT_DSI0 0x2
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#define MT8167_DSI0_SEL_IN_RDMA0 0x1
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static const struct mtk_mmsys_routes mt8167_mmsys_routing_table[] = {
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{
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DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0,
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MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN, OVL0_MOUT_EN_COLOR0,
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}, {
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DDP_COMPONENT_DITHER, DDP_COMPONENT_RDMA0,
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MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN, MT8167_DITHER_MOUT_EN_RDMA0
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}, {
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DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0,
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MT8167_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN, COLOR0_SEL_IN_OVL0
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}, {
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DDP_COMPONENT_RDMA0, DDP_COMPONENT_DSI0,
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MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN, MT8167_DSI0_SEL_IN_RDMA0
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}, {
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DDP_COMPONENT_RDMA0, DDP_COMPONENT_DSI0,
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MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN, MT8167_RDMA0_SOUT_DSI0
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},
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};
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#endif /* __SOC_MEDIATEK_MT8167_MMSYS_H */
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