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![Daniel Thompson](/assets/img/avatar_default.png)
[ Upstream commit8030cb9a55
] Quoting the header comments, IRQF_ONESHOT is "Used by threaded interrupts which need to keep the irq line disabled until the threaded handler has been run.". When applied to an interrupt that doesn't request a threaded irq then IRQF_ONESHOT has a lesser known (undocumented?) side effect, which it to disable the forced threading of the irq. For "normal" kernels (without forced threading) then, if there is no thread_fn, then IRQF_ONESHOT is a nop. In this case disabling forced threading is not appropriate for this driver because it calls wake_up_all() and this API cannot be called from no-thread interrupt handlers on PREEMPT_RT systems (deadlock risk, triggers sleeping-while-atomic warnings). Fix this by removing IRQF_ONESHOT. Fixes:2209481409
("soc: qcom: Add AOSS QMP driver") Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> [bjorn: Added Fixes tag] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220127173554.158111-1-daniel.thompson@linaro.org Signed-off-by: Sasha Levin <sashal@kernel.org>
572 lines
13 KiB
C
572 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019, Linaro Ltd
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*/
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#include <linux/clk-provider.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/mailbox_client.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/thermal.h>
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#include <linux/slab.h>
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#include <linux/soc/qcom/qcom_aoss.h>
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#define QMP_DESC_MAGIC 0x0
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#define QMP_DESC_VERSION 0x4
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#define QMP_DESC_FEATURES 0x8
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/* AOP-side offsets */
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#define QMP_DESC_UCORE_LINK_STATE 0xc
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#define QMP_DESC_UCORE_LINK_STATE_ACK 0x10
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#define QMP_DESC_UCORE_CH_STATE 0x14
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#define QMP_DESC_UCORE_CH_STATE_ACK 0x18
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#define QMP_DESC_UCORE_MBOX_SIZE 0x1c
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#define QMP_DESC_UCORE_MBOX_OFFSET 0x20
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/* Linux-side offsets */
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#define QMP_DESC_MCORE_LINK_STATE 0x24
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#define QMP_DESC_MCORE_LINK_STATE_ACK 0x28
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#define QMP_DESC_MCORE_CH_STATE 0x2c
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#define QMP_DESC_MCORE_CH_STATE_ACK 0x30
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#define QMP_DESC_MCORE_MBOX_SIZE 0x34
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#define QMP_DESC_MCORE_MBOX_OFFSET 0x38
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#define QMP_STATE_UP GENMASK(15, 0)
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#define QMP_STATE_DOWN GENMASK(31, 16)
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#define QMP_MAGIC 0x4d41494c /* mail */
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#define QMP_VERSION 1
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/* 64 bytes is enough to store the requests and provides padding to 4 bytes */
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#define QMP_MSG_LEN 64
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#define QMP_NUM_COOLING_RESOURCES 2
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static bool qmp_cdev_max_state = 1;
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struct qmp_cooling_device {
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struct thermal_cooling_device *cdev;
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struct qmp *qmp;
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char *name;
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bool state;
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};
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/**
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* struct qmp - driver state for QMP implementation
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* @msgram: iomem referencing the message RAM used for communication
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* @dev: reference to QMP device
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* @mbox_client: mailbox client used to ring the doorbell on transmit
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* @mbox_chan: mailbox channel used to ring the doorbell on transmit
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* @offset: offset within @msgram where messages should be written
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* @size: maximum size of the messages to be transmitted
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* @event: wait_queue for synchronization with the IRQ
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* @tx_lock: provides synchronization between multiple callers of qmp_send()
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* @qdss_clk: QDSS clock hw struct
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* @cooling_devs: thermal cooling devices
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*/
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struct qmp {
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void __iomem *msgram;
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struct device *dev;
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struct mbox_client mbox_client;
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struct mbox_chan *mbox_chan;
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size_t offset;
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size_t size;
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wait_queue_head_t event;
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struct mutex tx_lock;
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struct clk_hw qdss_clk;
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struct qmp_cooling_device *cooling_devs;
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};
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static void qmp_kick(struct qmp *qmp)
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{
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mbox_send_message(qmp->mbox_chan, NULL);
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mbox_client_txdone(qmp->mbox_chan, 0);
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}
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static bool qmp_magic_valid(struct qmp *qmp)
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{
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return readl(qmp->msgram + QMP_DESC_MAGIC) == QMP_MAGIC;
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}
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static bool qmp_link_acked(struct qmp *qmp)
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{
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return readl(qmp->msgram + QMP_DESC_MCORE_LINK_STATE_ACK) == QMP_STATE_UP;
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}
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static bool qmp_mcore_channel_acked(struct qmp *qmp)
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{
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return readl(qmp->msgram + QMP_DESC_MCORE_CH_STATE_ACK) == QMP_STATE_UP;
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}
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static bool qmp_ucore_channel_up(struct qmp *qmp)
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{
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return readl(qmp->msgram + QMP_DESC_UCORE_CH_STATE) == QMP_STATE_UP;
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}
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static int qmp_open(struct qmp *qmp)
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{
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int ret;
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u32 val;
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if (!qmp_magic_valid(qmp)) {
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dev_err(qmp->dev, "QMP magic doesn't match\n");
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return -EINVAL;
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}
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val = readl(qmp->msgram + QMP_DESC_VERSION);
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if (val != QMP_VERSION) {
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dev_err(qmp->dev, "unsupported QMP version %d\n", val);
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return -EINVAL;
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}
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qmp->offset = readl(qmp->msgram + QMP_DESC_MCORE_MBOX_OFFSET);
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qmp->size = readl(qmp->msgram + QMP_DESC_MCORE_MBOX_SIZE);
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if (!qmp->size) {
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dev_err(qmp->dev, "invalid mailbox size\n");
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return -EINVAL;
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}
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/* Ack remote core's link state */
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val = readl(qmp->msgram + QMP_DESC_UCORE_LINK_STATE);
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writel(val, qmp->msgram + QMP_DESC_UCORE_LINK_STATE_ACK);
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/* Set local core's link state to up */
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writel(QMP_STATE_UP, qmp->msgram + QMP_DESC_MCORE_LINK_STATE);
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qmp_kick(qmp);
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ret = wait_event_timeout(qmp->event, qmp_link_acked(qmp), HZ);
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if (!ret) {
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dev_err(qmp->dev, "ucore didn't ack link\n");
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goto timeout_close_link;
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}
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writel(QMP_STATE_UP, qmp->msgram + QMP_DESC_MCORE_CH_STATE);
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qmp_kick(qmp);
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ret = wait_event_timeout(qmp->event, qmp_ucore_channel_up(qmp), HZ);
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if (!ret) {
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dev_err(qmp->dev, "ucore didn't open channel\n");
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goto timeout_close_channel;
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}
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/* Ack remote core's channel state */
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writel(QMP_STATE_UP, qmp->msgram + QMP_DESC_UCORE_CH_STATE_ACK);
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qmp_kick(qmp);
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ret = wait_event_timeout(qmp->event, qmp_mcore_channel_acked(qmp), HZ);
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if (!ret) {
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dev_err(qmp->dev, "ucore didn't ack channel\n");
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goto timeout_close_channel;
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}
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return 0;
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timeout_close_channel:
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writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_CH_STATE);
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timeout_close_link:
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writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_LINK_STATE);
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qmp_kick(qmp);
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return -ETIMEDOUT;
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}
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static void qmp_close(struct qmp *qmp)
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{
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writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_CH_STATE);
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writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_LINK_STATE);
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qmp_kick(qmp);
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}
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static irqreturn_t qmp_intr(int irq, void *data)
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{
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struct qmp *qmp = data;
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wake_up_all(&qmp->event);
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return IRQ_HANDLED;
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}
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static bool qmp_message_empty(struct qmp *qmp)
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{
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return readl(qmp->msgram + qmp->offset) == 0;
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}
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/**
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* qmp_send() - send a message to the AOSS
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* @qmp: qmp context
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* @data: message to be sent
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* @len: length of the message
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*
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* Transmit @data to AOSS and wait for the AOSS to acknowledge the message.
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* @len must be a multiple of 4 and not longer than the mailbox size. Access is
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* synchronized by this implementation.
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*
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* Return: 0 on success, negative errno on failure
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*/
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int qmp_send(struct qmp *qmp, const void *data, size_t len)
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{
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long time_left;
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int ret;
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if (WARN_ON(IS_ERR_OR_NULL(qmp) || !data))
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return -EINVAL;
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if (WARN_ON(len + sizeof(u32) > qmp->size))
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return -EINVAL;
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if (WARN_ON(len % sizeof(u32)))
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return -EINVAL;
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mutex_lock(&qmp->tx_lock);
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/* The message RAM only implements 32-bit accesses */
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__iowrite32_copy(qmp->msgram + qmp->offset + sizeof(u32),
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data, len / sizeof(u32));
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writel(len, qmp->msgram + qmp->offset);
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/* Read back len to confirm data written in message RAM */
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readl(qmp->msgram + qmp->offset);
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qmp_kick(qmp);
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time_left = wait_event_interruptible_timeout(qmp->event,
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qmp_message_empty(qmp), HZ);
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if (!time_left) {
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dev_err(qmp->dev, "ucore did not ack channel\n");
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ret = -ETIMEDOUT;
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/* Clear message from buffer */
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writel(0, qmp->msgram + qmp->offset);
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} else {
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ret = 0;
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}
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mutex_unlock(&qmp->tx_lock);
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return ret;
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}
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EXPORT_SYMBOL(qmp_send);
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static int qmp_qdss_clk_prepare(struct clk_hw *hw)
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{
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static const char buf[QMP_MSG_LEN] = "{class: clock, res: qdss, val: 1}";
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struct qmp *qmp = container_of(hw, struct qmp, qdss_clk);
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return qmp_send(qmp, buf, sizeof(buf));
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}
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static void qmp_qdss_clk_unprepare(struct clk_hw *hw)
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{
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static const char buf[QMP_MSG_LEN] = "{class: clock, res: qdss, val: 0}";
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struct qmp *qmp = container_of(hw, struct qmp, qdss_clk);
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qmp_send(qmp, buf, sizeof(buf));
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}
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static const struct clk_ops qmp_qdss_clk_ops = {
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.prepare = qmp_qdss_clk_prepare,
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.unprepare = qmp_qdss_clk_unprepare,
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};
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static int qmp_qdss_clk_add(struct qmp *qmp)
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{
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static const struct clk_init_data qdss_init = {
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.ops = &qmp_qdss_clk_ops,
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.name = "qdss",
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};
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int ret;
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qmp->qdss_clk.init = &qdss_init;
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ret = clk_hw_register(qmp->dev, &qmp->qdss_clk);
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if (ret < 0) {
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dev_err(qmp->dev, "failed to register qdss clock\n");
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return ret;
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}
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ret = of_clk_add_hw_provider(qmp->dev->of_node, of_clk_hw_simple_get,
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&qmp->qdss_clk);
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if (ret < 0) {
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dev_err(qmp->dev, "unable to register of clk hw provider\n");
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clk_hw_unregister(&qmp->qdss_clk);
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}
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return ret;
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}
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static void qmp_qdss_clk_remove(struct qmp *qmp)
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{
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of_clk_del_provider(qmp->dev->of_node);
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clk_hw_unregister(&qmp->qdss_clk);
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}
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static int qmp_cdev_get_max_state(struct thermal_cooling_device *cdev,
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unsigned long *state)
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{
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*state = qmp_cdev_max_state;
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return 0;
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}
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static int qmp_cdev_get_cur_state(struct thermal_cooling_device *cdev,
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unsigned long *state)
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{
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struct qmp_cooling_device *qmp_cdev = cdev->devdata;
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*state = qmp_cdev->state;
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return 0;
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}
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static int qmp_cdev_set_cur_state(struct thermal_cooling_device *cdev,
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unsigned long state)
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{
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struct qmp_cooling_device *qmp_cdev = cdev->devdata;
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char buf[QMP_MSG_LEN] = {};
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bool cdev_state;
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int ret;
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/* Normalize state */
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cdev_state = !!state;
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if (qmp_cdev->state == state)
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return 0;
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snprintf(buf, sizeof(buf),
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"{class: volt_flr, event:zero_temp, res:%s, value:%s}",
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qmp_cdev->name,
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cdev_state ? "on" : "off");
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ret = qmp_send(qmp_cdev->qmp, buf, sizeof(buf));
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if (!ret)
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qmp_cdev->state = cdev_state;
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return ret;
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}
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static const struct thermal_cooling_device_ops qmp_cooling_device_ops = {
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.get_max_state = qmp_cdev_get_max_state,
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.get_cur_state = qmp_cdev_get_cur_state,
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.set_cur_state = qmp_cdev_set_cur_state,
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};
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static int qmp_cooling_device_add(struct qmp *qmp,
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struct qmp_cooling_device *qmp_cdev,
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struct device_node *node)
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{
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char *cdev_name = (char *)node->name;
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qmp_cdev->qmp = qmp;
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qmp_cdev->state = !qmp_cdev_max_state;
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qmp_cdev->name = cdev_name;
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qmp_cdev->cdev = devm_thermal_of_cooling_device_register
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(qmp->dev, node,
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cdev_name,
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qmp_cdev, &qmp_cooling_device_ops);
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if (IS_ERR(qmp_cdev->cdev))
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dev_err(qmp->dev, "unable to register %s cooling device\n",
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cdev_name);
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return PTR_ERR_OR_ZERO(qmp_cdev->cdev);
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}
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static int qmp_cooling_devices_register(struct qmp *qmp)
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{
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struct device_node *np, *child;
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int count = 0;
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int ret;
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np = qmp->dev->of_node;
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qmp->cooling_devs = devm_kcalloc(qmp->dev, QMP_NUM_COOLING_RESOURCES,
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sizeof(*qmp->cooling_devs),
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GFP_KERNEL);
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if (!qmp->cooling_devs)
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return -ENOMEM;
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for_each_available_child_of_node(np, child) {
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if (!of_find_property(child, "#cooling-cells", NULL))
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continue;
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ret = qmp_cooling_device_add(qmp, &qmp->cooling_devs[count++],
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child);
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if (ret)
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goto unroll;
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}
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if (!count)
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devm_kfree(qmp->dev, qmp->cooling_devs);
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return 0;
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unroll:
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while (--count >= 0)
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thermal_cooling_device_unregister
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(qmp->cooling_devs[count].cdev);
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devm_kfree(qmp->dev, qmp->cooling_devs);
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return ret;
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}
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static void qmp_cooling_devices_remove(struct qmp *qmp)
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{
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int i;
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for (i = 0; i < QMP_NUM_COOLING_RESOURCES; i++)
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thermal_cooling_device_unregister(qmp->cooling_devs[i].cdev);
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}
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/**
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* qmp_get() - get a qmp handle from a device
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* @dev: client device pointer
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*
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* Return: handle to qmp device on success, ERR_PTR() on failure
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*/
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struct qmp *qmp_get(struct device *dev)
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{
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struct platform_device *pdev;
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struct device_node *np;
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struct qmp *qmp;
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if (!dev || !dev->of_node)
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return ERR_PTR(-EINVAL);
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np = of_parse_phandle(dev->of_node, "qcom,qmp", 0);
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if (!np)
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return ERR_PTR(-ENODEV);
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pdev = of_find_device_by_node(np);
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of_node_put(np);
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if (!pdev)
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return ERR_PTR(-EINVAL);
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qmp = platform_get_drvdata(pdev);
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if (!qmp) {
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put_device(&pdev->dev);
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return ERR_PTR(-EPROBE_DEFER);
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}
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return qmp;
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}
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EXPORT_SYMBOL(qmp_get);
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/**
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* qmp_put() - release a qmp handle
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* @qmp: qmp handle obtained from qmp_get()
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*/
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void qmp_put(struct qmp *qmp)
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{
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/*
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* Match get_device() inside of_find_device_by_node() in
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* qmp_get()
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*/
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if (!IS_ERR_OR_NULL(qmp))
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put_device(qmp->dev);
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}
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EXPORT_SYMBOL(qmp_put);
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static int qmp_probe(struct platform_device *pdev)
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{
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struct qmp *qmp;
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int irq;
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int ret;
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qmp = devm_kzalloc(&pdev->dev, sizeof(*qmp), GFP_KERNEL);
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if (!qmp)
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return -ENOMEM;
|
|
|
|
qmp->dev = &pdev->dev;
|
|
init_waitqueue_head(&qmp->event);
|
|
mutex_init(&qmp->tx_lock);
|
|
|
|
qmp->msgram = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(qmp->msgram))
|
|
return PTR_ERR(qmp->msgram);
|
|
|
|
qmp->mbox_client.dev = &pdev->dev;
|
|
qmp->mbox_client.knows_txdone = true;
|
|
qmp->mbox_chan = mbox_request_channel(&qmp->mbox_client, 0);
|
|
if (IS_ERR(qmp->mbox_chan)) {
|
|
dev_err(&pdev->dev, "failed to acquire ipc mailbox\n");
|
|
return PTR_ERR(qmp->mbox_chan);
|
|
}
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
ret = devm_request_irq(&pdev->dev, irq, qmp_intr, 0,
|
|
"aoss-qmp", qmp);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "failed to request interrupt\n");
|
|
goto err_free_mbox;
|
|
}
|
|
|
|
ret = qmp_open(qmp);
|
|
if (ret < 0)
|
|
goto err_free_mbox;
|
|
|
|
ret = qmp_qdss_clk_add(qmp);
|
|
if (ret)
|
|
goto err_close_qmp;
|
|
|
|
ret = qmp_cooling_devices_register(qmp);
|
|
if (ret)
|
|
dev_err(&pdev->dev, "failed to register aoss cooling devices\n");
|
|
|
|
platform_set_drvdata(pdev, qmp);
|
|
|
|
return 0;
|
|
|
|
err_close_qmp:
|
|
qmp_close(qmp);
|
|
err_free_mbox:
|
|
mbox_free_channel(qmp->mbox_chan);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int qmp_remove(struct platform_device *pdev)
|
|
{
|
|
struct qmp *qmp = platform_get_drvdata(pdev);
|
|
|
|
qmp_qdss_clk_remove(qmp);
|
|
qmp_cooling_devices_remove(qmp);
|
|
|
|
qmp_close(qmp);
|
|
mbox_free_channel(qmp->mbox_chan);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id qmp_dt_match[] = {
|
|
{ .compatible = "qcom,sc7180-aoss-qmp", },
|
|
{ .compatible = "qcom,sc7280-aoss-qmp", },
|
|
{ .compatible = "qcom,sdm845-aoss-qmp", },
|
|
{ .compatible = "qcom,sm8150-aoss-qmp", },
|
|
{ .compatible = "qcom,sm8250-aoss-qmp", },
|
|
{ .compatible = "qcom,sm8350-aoss-qmp", },
|
|
{ .compatible = "qcom,aoss-qmp", },
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(of, qmp_dt_match);
|
|
|
|
static struct platform_driver qmp_driver = {
|
|
.driver = {
|
|
.name = "qcom_aoss_qmp",
|
|
.of_match_table = qmp_dt_match,
|
|
.suppress_bind_attrs = true,
|
|
},
|
|
.probe = qmp_probe,
|
|
.remove = qmp_remove,
|
|
};
|
|
module_platform_driver(qmp_driver);
|
|
|
|
MODULE_DESCRIPTION("Qualcomm AOSS QMP driver");
|
|
MODULE_LICENSE("GPL v2");
|